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* gas/ChangeLogAlan Modra2002-07-081-4/+4
| | | | | | | | | * config/tc-i386.c (process_suffix): Remove intel mode movsx and movzx fudges. (md_assemble): Instead, zap the suffix here. include/opcode/ChangeLog * i386.h: Remove IgnoreSize from movsx and movzx.
* reorder cmpsd, movsdAlan Modra2002-04-111-3/+3
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* * i386.h: Add intel mode cmpsd and movsd.Alan Modra2002-04-111-0/+6
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* * i386.h (push,pop): Fix Reg64 to WordReg to allow 16bit operands.Jan Hubicka2002-02-181-5/+5
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* * i386.h (push,pop): Allow 16bit operands in 64bit mode.Jan Hubicka2002-02-111-45/+59
| | | | | | | | | | (xchg): Fix. (in, out): Disable 64bit operands. (call, jmp): Avoid REX prefixes. (jcxz): Prohibit in 64bit mode (jrcxz, loop): Add 64bit variants. (movq): Fix patterns. (movmskps, pextrw, pinstrw): Add 64bit variants.
* * i386.h (i386_optab): Add entries for "sldr", "smsw" and "str" toAlan Modra2001-11-131-3/+6
| | | | | | | accept WordReg. * i386-dis.c (grps): Change "sldt", "str", and "smsw" entries to "sldtQ", "strQ", "smswQ" respectively; all with Ev operand category instead of Ew.
* Correct cvtps2dq, movdq2q, movq2dq, and movq problems.Alan Modra2001-05-121-3/+3
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* Assorted fixes to pinsrw, pextrw, pmovmskb, movmskp, maskmovq.Alan Modra2001-05-041-4/+4
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* Small tweaks to sse2 instructions.Alan Modra2001-03-241-2/+3
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* paddq and psubq support.Alan Modra2001-03-221-0/+4
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* Fix register name printed in warning message.Alan Modra2001-03-191-0/+3
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* Fix typos in ChangeLogs; add coff/external.h; fix copyright datesNick Clifton2001-03-141-2/+3
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* * i386.h (i386_optab): SSE integer converison instructions haveJan Hubicka2001-02-121-6/+6
| | | | | | | 64bit versions on x86-64. * i386-dis.c (prefix_user_t): Add 'Y' to SSE ineger converison instructions. (putop): Handle 'Y'
* Fix swapgs instruction.Alan Modra2001-01-241-3/+3
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* * i386.c (md_assemble): Check cpu_flags even for nullary instructions.Jan Hubicka2001-01-131-3/+5
| | | | | | | * i386.h (i386_optab): Fix pusha and ret templates. * i386-dis.c (dis386_att, disx86_64_att): Fix ret, lret and iret templates.
* * i386.h (pinsrw): Add.Jan Hubicka2001-01-101-4/+4
| | | | | | | (pshufw): Remove. (cvttpd2dq): Fix operands. (cvttps2dq): Likewise. (movq2q): Rename to movdq2q.
* Fix "movnti"Alan Modra2001-01-101-5/+5
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* * tc-i386.c (md_assemble): Handle third byte of the opcode as prefix.Jan Hubicka2001-01-051-3/+3
| | | | * i386.h (i386_optab): Make [sml]fence template to use immext field.
* * tc-i386.h (CpuK6, CpuAthlon, CpuSledgehammer, CpuMMX, Cpu3dnow,Jan Hubicka2001-01-031-4/+168
| | | | | | | | | CpuUnknown): Renumber (CpuP4, CpuSSE2): New. (CpuUnknownFlags): Add CpuP4 and CpuSSE2 * i386.h (i386_optab): Fix 64bit pushf template; Add instructions introduced by Pentium4
* * configure.in: Add support for x86_64 and x86_64-*-linux-gnu*Jan Hubicka2000-12-301-272/+441
| | | | | | | | | | | | | * NEWS: Add x86_64. * i386.h (i386_optab): Add "rex*" instructions; add swapgs; disable jmp/call far direct instructions for 64bit mode; add syscall and sysret; disable registers for 0xc6 template. Add 'q' suffixes to extendable instructions, disable obsoletted instructions, add new sign/zero extension ones. (i386_regtab): Add extended registers. (*Suf): Add No_qSuf. (q_Suf, wlq_Suf, bwlq_Suf): New.
* * tc-i386.h (i386_target_format): Define even for ELFs.Jan Hubicka2000-12-201-107/+107
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | (QWORD_MNEM_SUFFIX): New macro. (CpuK6,CpuAthlon,CpuSledgehammer, Cpu64, CpuNo64, CpuUnknownFlags): New macros (CpuMMX,CpuSSE,Cpu3dnow, CpuUnknown): Renumber. (IgnoreSize, DefaultSize, No_?Suf, FWait, IsString, regKludge, IsPrefix, ImmExt): Renumber. (Size64, No_qSuf, NoRex64, Rex64): New macros. (Reg64, Imm32S, Imm64, Disp32S, Disp64): New macros. (Imm8, Imm8S, Imm16, Imm32, Imm1, BaseIndex, Disp8, Disp16, Disp32, InOutPortReg,ShiftCount, Control, Debug, Test, FloatReg, FloatAcc, SReg2, SReg3, Acc, JumpAbsolute, RegMMX, RegXMM, EsSeg, InvMem): Renumber. (Reg, WordReg): Add Reg64. (Imm): Add Imm32S and Imm64. (EncImm): New. (Disp): Add Disp64 and Disp32S. (AnyMem): Add Disp32S. (RegRex, RegRex64): New macros. (rex_byte): New type. * tc-i386.c (set_16bit_code_flag): Kill. (fits_in_unsigned_long, fits_in_signed_long): New functions. (reloc): New parameter "signed"; support x86_64. (set_code_flag): New. (DEFAULT_ARCH): New macro; default to "i386". (default_arch): New static variable. (struct _i386_insn): New fields Operand_PCrel; rex. (flag_16bit_code): Kill; All tests replaced to "flag_code == CODE_64BIT"; (flag_code): New enum and static variable. (use_rela_relocations): New static variable. (flag_code_names): New static variable. (cpu_arch_flags): Default to CpuUnknownFlags|CpuNo64. (cpu_arch): Add "sledgehammer"; Add CPUAthlon to Athlon and CpuK6 to K6 and Athlon. (i386_align_code): Return plain "nop" for x86_64. (mode_from_disp_size): Support Disp32S. (smallest_imm_type): Support Imm32S and Imm64. (offset_in_range): Support size of 8. (set_cpu_arch): Do not clobber to Cpu64/CpuNo64. (md_pseudo_table): Add "code64"; use set_code_flat. (md_begin): Emit sane error message on hash failure. (tc_i386_fix_adjustable): Support x86_64 relocations. (md_assemble): Support QWORD_MNEM_SUFFIX, REX registers, instructions supported on particular arch just partially, output of 64bit immediates, handling of Imm32S and Disp32S type. (i386_immedaite): Support x86_64 relocations; support 64bit constants. (i386_displacement): Likewise. (i386_index_check): Cleanup; support 64bit addresses. (md_apply_fix3): Support x86_64 relocation and rela. (md_longopts): Add "32" and "64". (md_parse_option): Add OPTION_32 and OPTION_64. (i386_target_format): Call even for ELFs; choose between elf64-x86-64 and elf32-i386. (i386_validate_fix): Refuse GOTOFF in 64bit mode. (tc_gen_reloc): Support rela relocations and x86_64. (intel_e09_1): Support QWORD. * i386.h (i386_optab): Replace "Imm" with "EncImm". (i386_regtab): Add flags field.
* * tc-i386.c (md_assemble): Refuse 's' and 'l' suffixes in the intelJan Hubicka2000-12-111-76/+60
| | | | | | | | | | | | | | mode; convert 'd' suffix to 's' or 'l'; remove all DWORD_MNEM_SUFFIX references. (intel_e09_1): Convert QWORD to 'l' suffix for FP operations; refuse otherwise. * tc-i386.h (DWORD_MNEM_SUFFIX): Kill. (No_dSuf): Kill. * i386.h (*_Suf): Remove No_dSuf. (d_suf, wld_Suf,sld_Suf, sldx_Suf, bwld_Suf, d_FP, sld_FP, sldx_FP) Remove. (i386_optab): Remove 'd' in the suffixes.
* 2000-08-15 H.J. Lu <hjl@gnu.org>H.J. Lu2000-08-161-2/+2
| | | | | * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the IgnoreSize change.
* Allow d suffix on iretAlan Modra2000-05-231-2/+3
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* Fix fild.Alan Modra2000-05-171-3/+3
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* Fix cpu_flags for sys{enter,exit} fx{save,restore}Alan Modra2000-05-131-5/+5
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* `.arch cpu_type' pseudo for x86.Alan Modra2000-05-131-774/+795
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* Mostly cosmetic. Fixes to comments. Don't start as_bad and as_warnAlan Modra2000-03-261-62/+71
| | | | messages with capital. Don't malign Unixware, malign SysV386 instead.
* Extend the i386 gas testsuite to do some tests for intel_syntax. Fix allAlan Modra2000-02-251-2/+2
| | | | | | | the errors exposed by this addition. These were intel mode "fi... word ptr", "fi... dword ptr", "jmp Imm seg, Imm offset", "out dx,al". The failure with intel "out dx,al" was also present in att "out al,dx". Extend testsuite to catch this case too.
* Correct intel_syntax fsub* and fdiv* handling. Oh, how I'd like to be ridAlan Modra2000-02-241-4/+9
| | | | of UNIXWARE_COMPAT.
* Cosmetic changes to tc-i386.[ch] + extend x86 gas testsuite jmp andAlan Modra2000-01-151-2/+2
| | | | call tests + tweak intel mode far call and jmp.
* x86 indirect jump/call syntax fixes. Disassembly fix for lcall.Alan Modra1999-12-271-2/+5
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* Allow spaces in i386 FP reg names, eg. %st ( 1 ).Alan Modra1999-08-291-10/+14
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* Add AMD athlon support to x86 assembler and disassembler.Alan Modra1999-08-211-34/+36
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* Support for gcc to generate 16-bit i386 code. (.code16gcc)Alan Modra1999-08-041-25/+34
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* 8Alan Modra1999-07-131-7/+10
| | | | include/opcode/i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw
* PAlan Modra1999-06-231-42/+42
| | | | | include/opcode/i386.h: Allow bswapl, arplw, and other dodgy insns. opcodes/i386-dis.c: Fix a comment
* PAlan Modra1999-05-131-133/+227
| | | | | i386 PIII SIMD support, remove ReverseRegRegmem kludge tidy a few things in i386 intel mode disassembly
* 19990502 sourceware importbinu_ss_19990502Richard Henderson1999-05-031-0/+1063
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