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* This commit was manufactured by cvs2svn to create tag 'binutils-csl-binutils-csl-sourcerygxx-4_1-5cvs2svn2006-05-112-194/+0
| | | | | | | | sourcerygxx-4_1-5'. Sprout from binutils-csl-2_17-branch 2006-05-11 15:17:42 UTC Carlos O'Donell <carlos@codesourcery.com> '' Delete: compile djunpack.bat
* 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>Carlos O'Donell2006-05-111-0/+7
| | | | | | | * bfd/doc/bfd.texinfo: Rename "Index" to "BFD Index" * ld/ld.texinfo: Rename "Index" to "LD Index" * gas/doc/as.texinfo: Rename "Index" to "AS Index" Rename "ABORT" to "ABORT (COFF)"
* Backport:Joseph Myers2006-05-061-0/+8
| | | | | | | 2006-03-30 Jakub Jelinek <jakub@redhat.com> * ldmisc.c (vfinfo): Revert 2005-10-05 changes. If bfd_find_nearest_line succeeded for %C or %D, but filename is NULL, print section+offset at the end.
* * gas/config/tc-arm.c (stdarg.h): include.Julian Brown2006-05-051-0/+107
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | (arm_it): Add uncond_value field. Add isvec and issingle to operand array. (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and REG_TYPE_NSDQ (single, double or quad vector reg). (reg_expected_msgs): Update. (BAD_FPU): Add macro for unsupported FPU instruction error. (parse_neon_type): Support 'd' as an alias for .f64. (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ sets of registers. (parse_vfp_reg_list): Don't update first arg on error. (parse_neon_mov): Support extra syntax for VFP moves. (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO, OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ. (parse_operands): Support isvec, issingle operands fields, new parse codes above. (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs, msr variants. (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above. (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez. (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros. (NEON_SHAPE_DEF): New macro. Define table of possible instruction shapes. (neon_shape): Redefine in terms of above. (neon_shape_class): New enumeration, table of shape classes. (neon_shape_el): New enumeration. One element of a shape. (neon_shape_el_size): Register widths of above, where appropriate. (neon_shape_info): New struct. Info for shape table. (neon_shape_tab): New array. (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL. (neon_check_shape): Rewrite as... (neon_select_shape): New function to classify instruction shapes, driven by new table neon_shape_tab array. (neon_quad): New function. Return 1 if shape should set Q flag in instructions (or equivalent), 0 otherwise. (type_chk_of_el_type): Support F64. (el_type_of_type_chk): Likewise. (neon_check_type): Add support for VFP type checking (VFP data elements fill their containing registers). (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE in thumb mode for VFP instructions. (do_vfp_nsyn_opcode): New function. Look up the opcode in argument, and encode the current instruction as if it were that opcode. (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS arguments, call function in PFN. (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul) (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str) (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul) (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push) (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions. Redirect Neon-syntax VFP instructions to VFP instruction handlers. (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm) (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield) (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh) (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri) (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext) (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn) (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long) (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt) (do_neon_swp): Use neon_select_shape not neon_check_shape. Use neon_quad. (vfp_or_neon_is_neon): New function. Call if a mnemonic shared between VFP and Neon turns out to belong to Neon. Perform architecture check and fill in condition field if appropriate. (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg) (do_neon_cvt): Add support for VFP variants of instructions. (neon_cvt_flavour): Extend to cover VFP conversions. (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP vmov variants. (do_neon_ldr_str): Handle single-precision VFP load/store. (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use NS_NULL not NS_IGNORE. (opcode_tag): Add OT_csuffixF for operands which either take a conditional suffix, or have 0xF in the condition field. (md_assemble): Add support for OT_csuffixF. (NCE): Replace macro with... (NCE_tag, NCE, NCEF): New macros. (nCE): Replace macro with... (nCE_tag, nCE, nCEF): New macros. (insns): Add support for VFP insns or VFP versions of insns msr, mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop, vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia, vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared VFP/Neon insns together. * gas/testsuite/gas/arm/itblock.s: New file. Helper macro for making all-true IT blocks. * gas/testsuite/gas/arm/neon-cond-bad-inc.s: New test. Make sure unconditional Neon instructions are rejected... * gas/testsuite/gas/arm/neon-cond-bad.s: In ARM mode, and... * gas/testsuite/gas/arm/neon-cond-bad_t2.s: Accepted in Thumb mode (with IT). * gas/testsuite/gas/arm/neon-cond-bad.l: Expected error output in ARM mode. * gas/testsuite/gas/arm/neon-cond-bad.d: Control ARM mode test. * gas/testsuite/gas/arm/neon-cond-bad_t2.d: Expected output in Thumb mode. * gas/testsuite/gas/arm/vfp-neon-syntax-inc.s: Test VFP Neon-style syntax. * gas/testsuite/gas/arm/vfp-neon-syntax.s: ...in ARM mode. * gas/testsuite/gas/arm/vfp-neon-syntax_t2.s: ...and Thumb mode. * gas/testsuite/gas/arm/vfp-neon-syntax.d: Expected output in ARM mode. * gas/testsuite/gas/arm/vfp-neon-syntax_t2.d: Expected output in Thumb mode.
* * configure: Regenerate.Nathan Sidwell2006-05-053-2/+7
| | | | * configure.in: Enable gprof for cross builds.
* * gas/doc/c-arm.texi: Add documentation for .dn/.qn directives.Julian Brown2006-05-031-0/+4
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* 2006-05-03 Paul Brook <paul@codesourcery.com>Paul Brook2006-05-031-0/+23
| | | | | | | | | | | | | | | | | | | | | | | * bfd/elf32-arm.c (elf32_arm_reloc_map): Add MOVW and MOVT relocs. (elf32_arm_final_link_relocate): Handle MOVW and MOVT relocs. (elf32_arm_gc_sweep_hook, elf32_arm_check_relocs): Ditto. * bfd/reloc.c: Ditto. * bfd/bfd-in2.h: Regenerate. * bfd/libbfd.h: Regenerate. * bfd/libcoff.h: Regenerate. * gas/config/tc-arm.c (parse_half): New function. (operand_parse_code): Remove OP_Iffff. Add OP_HALF. (parse_operands): Ditto. (do_mov16): Reject invalid relocations. (do_t_mov16): Ditto. Use Thumb reloc numbers. (insns): Replace Iffff with HALF. (md_apply_fix): Add MOVW and MOVT relocs. (tc_gen_reloc): Ditto. * gas/doc/c-arm.texi: Document relocation operators * ld/testsuite/ld-arm/arm-elf.exp: Add arm-movwt. * ld/testsuite/ld-arm/arm-movwt.d: New test. * ld/testsuite/ld-arm/arm-movwt.s: New test. * ld/testsuite/ld-arm/arm.ld: Add .far.
* * gas/config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offsetJoseph Myers2006-05-021-0/+14
| | | | | | | | | | | | | by 4 here. (md_apply_fix3): Multiply offset by 4 here for BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2. * gas/testsuite/gas/arm/iwmmxt.s: Increase offsets for wstrb and wstrh. * gas/testsuite/gas/arm/iwmmxt.d: Update expected results. * gas/testsuite/gas/arm/iwmmxt-bad2.s: Test wstrb, wstrh, wldrb and wldrh. * gas/testsuite/gas/arm/iwmmxt-bad2.l: Update expected error messages.
* 2006-05-01 Paul Brook <paul@codesourcery.com>Paul Brook2006-05-011-0/+12
| | | | | | | | | | | | * bfd/elf32-arm.c (elf32_arm_final_link_relocate): Set thumb funciton bit for R_ARM_REL32. * gas/config/tc-arm.c (arm_optimize_expr): New function. * gas/config/tc-arm.h (md_optimize_expr): Define (arm_optimize_expr): Add prototype. (TC_FORCE_RELOCATION_SUB_SAME): Define. * ld/testsuite/ld-arm/arm-elf.exp: Add thumb-rel32. * ld/testsuite/ld-arm/thumb-rel32.d: New test. * ld/testsuite/ld-arm/thumb-rel32.s: New test.
* 2006-04-29 Paul Brook <paul@codesourcery.com>Paul Brook2006-04-291-0/+23
| | | | | | | | | | | | | | | | | | | | | | | * opcodes/arm-dis.c (coprocessor_opcodes): Add %c to unconditional arm instructions. (neon_opcodes): Add conditional execution specifiers. (thumb_opcodes): Ditto. (thumb32_opcodes): Ditto. (arm_conditional): Change 0xe to "al" and add "" to end. (ifthen_state, ifthen_next_state, ifthen_address): New. (IFTHEN_COND): Define. (print_insn_coprocessor, print_insn_neon): Print thumb conditions. (print_insn_arm): Change %c to use new values of arm_conditional. (print_insn_thumb16): Print thumb conditions. Add %I. (print_insn_thumb32): Print thumb conditions. (find_ifthen_state): New function. (print_insn): Track IT block state. * gas/testsuite/gas/arm/thumb2_bcond.d: Update expected output. * gas/testsuite/gas/arm/thumb32.d: Ditto. * gas/testsuite/gas/arm/vfp1_t2.d: Ditto. * gas/testsuite/gas/arm/vfp1xD_t2.d: Ditto. * binutils/testsuite/binutils-all/arm/objdump.exp: New file. * binutils/testsuite/binutils-all/arm/thumb2-cond.s: New test.
* * doc/as.texinfo: Mention that some .type syntaxes are notMark Mitchell2006-04-291-0/+5
| | | | supported on all architectures.
* include/opcodes/Richard Sandiford2006-04-272-0/+16
| | | | | | | | | | | | | | * m68k.h (mcf_mask): Define. opcodes/ * m68k-opc.c (m68k_opcodes): Fix the masks of the Coldfire fmovemd and fmovem entries. Put register list entries before immediate mask entries. Use "l" rather than "L" in the fmovem entries. * m68k-dis.c (match_insn_m68k): Remove the PRIV argument and work it out from INFO. (m68k_scan_mask): New function, split out from... (print_insn_m68k): ...here. If no architecture has been set, first try printing an m680x0 instruction, then try a Coldfire one.
* bfd/Richard Sandiford2006-04-271-0/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * elf32-m68k.c (elf_m68k_pcrel_insn): New structure. (elf_m68k_plt_info): Likewise. (elf_m68k_plt_info): New table. (CFV4E_PLT_ENTRY_SIZE): Rename to... (ISAB_PLT_ENTRY_SIZE): ...this. (CFV4E_FLAG): Delete. (elf_cfv4e_plt0_entry): Rename to... (elf_isab_plt0_entry): ...this. Adjust comments. Use (-6,%pc,%d0) for the second instruction too. (elf_cfv4e_plt_entry): Rename to... (elf_isab_plt_entry): ...this. Adjust comments and use (-6,%pc,%d0). (elf_isab_plt_info): New table. (CPU32_FLAG): Delete. (PLT_CPU32_ENTRY_SIZE): Rename to... (CPU32_PLT_ENTRY_SIZE): ...this. (elf_cpu32_plt0_entry): Update bounds accordingly. (elf_cpu32_plt_entry): Likewise. (elf_cpu32_plt_info): New table. (elf_m68k_link_hash_table): Add a plt_info field. (elf_m68k_link_hash_table_create): Initialize it. (elf_m68k_get_plt_info): New function. (elf_m68k_always_size_sections): Likewise. (elf_m68k_adjust_dynamic_symbol): Use the plt_info hash table field. (elf_m68k_install_pcrel_field): New function. (elf_m68k_finish_dynamic_symbol): Factor code using plt_info and elf_m68k_install_pcrel_field. (elf_m68k_finish_dynamic_sections): Likewise. (elf_m68k_plt_sym_val): Use elf_m68k_get_plt_info. (elf_backend_always_size_sections): Define.
* * gas/config/tc-arm.c (parse_vfp_reg_list): Improve register boundsJulian Brown2006-04-261-0/+18
| | | | | | | | | | | | | | | | | checking. (do_neon_mov): Enable several VMOV variants for VFP. Add suitable architecture version checks. (insns): Allow overlapping instructions to be used in VFP mode. * gas/testsuite/gas/arm/vfp-neon-overlap.s: New test. Overlapping VFP/Neon instructions. * gas/testsuite/gas/arm/vfp-neon-overlap.d: Expected output of above. * gas/testsuite/gas/arm/vfp1xD.d: Test for fldmx/fstmx. * gas/testsuite/gas/arm/vfp1xD_t2.d: Likewise. * gas/testsuite/gas/arm/vfpv3-32drs.d: Likewise. * opcodes/arm-dis.c (coprocessor_opcodes): Don't interpret fldmx/fstmx as vldm/vstm.
* * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...Julian Brown2006-04-261-0/+20
| | | | | | | | | | | | | | | | | | | (is_quarter_float): Rename from above. Simplify slightly. (parse_qfloat_immediate): Parse a "quarter precision" floating-point number. (parse_neon_mov): Parse floating-point constants. (neon_qfloat_bits): Fix encoding. (neon_cmode_for_move_imm): Tweak to use floating-point encoding in preference to integer encoding when using the F32 type. * gas/testsuite/gas/arm/neon-const.s: New testcase. Neon floating-point constants. * gas/testsuite/gas/arm/neon-const.d: Expected output of above. * gas/testsuite/gas/arm/neon-cov.d: Expect floating-point disassembly for VMOV.F32. * opcodes/arm-dis.c (print_insn_neon): Disassemble floating-point constant VMOV.
* * libiberty/floatformat.c (floatformat_to_double): Fix (biased)Julian Brown2006-04-241-0/+5
| | | | exponent=0 case.
* Correct ChangeLog.csl date typo.Carlos O'Donell2006-04-121-1/+1
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* 2006-04-12 Carlos O'Donell <carlos@codesourcery.com>Carlos O'Donell2006-04-123-3/+8
| | | | | * Makefile.tpl: Add install-html to install target deps. * Makefile.in: Regenerate.
* * gas/config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (soJulian Brown2006-04-071-0/+86
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | zero-initialising structures containing it will lead to invalid types). (arm_it): Add vectype to each operand. (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias defined field. (neon_typed_alias): New structure. Extra information for typed register aliases. (reg_entry): Add neon type info field. (arm_reg_parse): Remove RTYPE argument (revert to previous arguments). Break out alternative syntax for coprocessor registers, etc. into... (arm_reg_alt_syntax): New function. Alternate syntax handling broken out from arm_reg_parse. (parse_neon_type): Move. Return SUCCESS/FAIL. (first_error): New function. Call to ensure first error which occurs is reported. (parse_neon_operand_type): Parse exactly one type. (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move. (parse_typed_reg_or_scalar): New function. Handle core of both arm_typed_reg_parse and parse_scalar. (arm_typed_reg_parse): Parse a register with an optional type. (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar result. (parse_scalar): Parse a Neon scalar with optional type. (parse_reg_list): Use first_error. (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse. (neon_alias_types_same): New function. Return true if two (alias) types are the same. (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type of elements. (insert_reg_alias): Return new reg_entry not void. (insert_neon_reg_alias): New function. Insert type/index information as well as register for alias. (create_neon_reg_alias): New function. Parse .dn/.qn directives and make typed register aliases accordingly. (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start of line. (s_unreq): Delete type information if present. (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls. (s_arm_unwind_save_mmxwcg): Likewise. (s_arm_unwind_movsp): Likewise. (s_arm_unwind_setfp): Likewise. (parse_shift): Likewise. (parse_shifter_operand): Likewise. (parse_address): Likewise. (parse_tb): Likewise. (tc_arm_regname_to_dw2regnum): Likewise. (md_pseudo_table): Add dn, qn. (parse_neon_mov): Handle typed operands. (parse_operands): Likewise. (neon_type_mask): Add N_SIZ. (N_ALLMODS): New macro. (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error. (el_type_of_type_chk): Add some safeguards. (modify_types_allowed): Fix logic bug. (neon_check_type): Handle operands with types. (neon_three_same): Remove redundant optional arg handling. (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm) (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute) (do_neon_step): Adjust accordingly. (neon_cmode_for_logic_imm): Use first_error. (do_neon_bitfield): Call neon_check_type. (neon_dyadic): Rename to... (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield to allow modification of type of the destination. (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d) (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly. (do_neon_compare): Make destination be an untyped bitfield. (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX. (neon_mul_mac): Return early in case of errors. (neon_move_immediate): Use first_error. (neon_mac_reg_scalar_long): Fix type to include scalar. (do_neon_dup): Likewise. (do_neon_mov): Likewise (in several places). (do_neon_tbl_tbx): Fix type. (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane) (do_neon_ld_dup): Exit early in case of errors and/or use first_error. (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL. Handle .dn/.qn directives. (REGDEF): Add zero for reg_entry neon field. * gas/testsuite/gas/arm/neon-psyn.s: Basic test of programmers syntax. * gas/testsuite/gas/arm/neon-psyn.d: Expected output of above.
* 2006-04-03 Carlos O'Donell <carlos@codesourcery.com>Carlos O'Donell2006-04-0310-166/+2877
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * Makefile.tpl: Add install-html target. * Makefile.def: Add install-html target. * Makefile.in: Regenerate. * configure.in: Add --with-datarootdir, --with-docdir, and --with-htmldir options. * configure: Regenerate. * opcodes/Makefile.am: Add install-html target. * opcodes/Makefile.in: Regenerate. * libiberty/Makefile.in: Add install-html, install-html-am, and install-html-recursive targets. Define mkdir_p and NORMAL_INSTALL. * libiberty/configure.ac: AC_SUBST datarootdir, docdir, htmldir. * libiberty/configure: Regenerate. * libiberty/testsuite/Makefile.in: Add install-html and html targets. * ld/Makefile.am: Add install-html, install-html-am, and install-html-recursive targets. * ld/Makefile.in: Regenerate. * ld/configure.in: AC_SUBST datarootdir, docdir, htmldir. * ld/configure: Regenerate. * ld/po/Make-in: Add install-html target. * intl/Makefile.in: Add html info and dvi and install-html to .PHONY Add install-html target. * gprof/po/Make-in: Add install-html target. * gprof/Makefile.am: Add install-html, install-html-am and install-html-recursive targets. * gprof/Makefile.in: Regenerate. * gprof/configure.in: AC_SUBST datarootdir, docdir, htmldir. * gprof/configure: Regenerate. * gas/po/Make-in: Add install-html target. * gas/Makefile.am: Add install-html and install-html-recursive targets. * gas/Makefile.in: Regenerate. * gas/configure.in: AC_SUBST datarootdir, docdir, htmldir. * gas/configure: Regenerate. * gas/doc/Makefile.am: Add install-html and install-html-am targets. * gas/doc/Makefile.in: Regenerate. * binutils/po/Make-in: Add install-html target. * binutils/Makefile.am: Add install-html and install-html-recursive targets. * binutils/Makefile.in: Regenerate. * binutils/configure.in: AC_SUBST datarootdir, docdir and htmldir. * binutils/configure: Regenerate. * binutils/doc/Makefile.am: Add install-html and install-html-am targets. * binutils/doc/Makefile.in: Regenerate. * bfd/po/Make-in: Add install-html target. * bfd/Makefile.am: Rename docdir to bfddocdir. Add datarootdir, docdir htmldir. Add install-html and install-html-recursive targets. * bfd/Makefile.in: Regenerate. * bfd/configure.in: AC_SUBST for datarootdir, docdir and htmldir. * bfd/configure: Regenerate. * bfd/doc/Makefile.am: Add install-html and install-html-am targets. Define datarootdir, docdir and htmldir. * bfd/doc/Makefile.in: Regenerate. * etc/Makefile.in: Add install-html target. Add htmldir, docdir and datarootdir. * etc/configure.texi: Document install-html target. * etc/configure.in: AC_SUBST datarootdir, docdir, htmldir. * etc/configure: Regenerate.
* * binutils/readelf.c (arm_attr_tag_VFP_arch): Add VFPv3.Julian Brown2006-04-032-1/+214
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * gas/config/tc-arm.c (limits.h): Include. (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1) (fpu_vfp_v3_or_neon_ext): Declare constants. (neon_el_type): New enumeration of types for Neon vector elements. (neon_type_el): New struct. Define type and size of a vector element. (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per instruction. (neon_type): Define struct. The type of an instruction. (arm_it): Add 'vectype' for the current instruction. (isscalar, immisalign, regisimm, isquad): New predicates for operands. (vfp_sp_reg_pos): Rename to... (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn tags. (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ (Neon D or Q register). (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D register. (GE_OPT_PREFIX_BIG): Define constant, for use in... (my_get_expression): Allow above constant as argument to accept 64-bit constants with optional prefix. (arm_reg_parse): Add extra argument to return the specific type of register in when either a D or Q register (REG_TYPE_NDQ) is requested. Can be NULL. (parse_scalar): New function. Parse Neon scalar (vector reg and index). (parse_reg_list): Update for new arm_reg_parse args. (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists. (parse_neon_el_struct_list): New function. Parse element/structure register lists for VLD<n>/VST<n> instructions. (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args. (s_arm_unwind_save_mmxwr): Likewise. (s_arm_unwind_save_mmxwcg): Likewise. (s_arm_unwind_movsp): Likewise. (s_arm_unwind_setfp): Likewise. (parse_big_immediate): New function. Parse an immediate, which may be 64 bits wide. Put results in inst.operands[i]. (parse_shift): Update for new arm_reg_parse args. (parse_address): Likewise. Add parsing of alignment specifiers. (parse_neon_mov): Parse the operands of a VMOV instruction. (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST, OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC, OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64, OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ. (parse_operands): Handle new codes above. (encode_arm_vfp_sp_reg): Rename to... (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if selected VFP version only supports D0-D15. (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z) (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2) (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst) (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new encode_arm_vfp_reg name, and allow 32 D regs. (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn) (do_vfp_dp_rd_rn_rm, do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D regs. (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16) (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle constant-load and conversion insns introduced with VFPv3. (neon_tab_entry): New struct. (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and those which are the targets of pseudo-instructions. (neon_opc): Enumerate opcodes, use as indices into... (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB. (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT) (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE) (NEON_ENC_DUP): Define meaningful helper macros to look up values in neon_enc_tab. (neon_shape): Enumerate shapes (permitted register widths, etc.) for Neon instructions. (neon_type_mask): New. Compact type representation for type checking. (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common permitted type combinations. (N_IGNORE_TYPE): New macro. (neon_check_shape): New function. Check an instruction shape for multiple alternatives. Return the specific shape for the current instruction. (neon_modify_type_size): New function. Modify a vector type and size, depending on the bit mask in argument 1. (neon_type_promote): New function. Convert a given "key" type (of an operand) into the correct type for a different operand, based on a bit mask. (type_chk_of_el_type): New function. Convert a type and size into the compact representation used for type checking. (el_type_of_type_ckh): New function. Reverse of above (only when a single bit is set in the bit mask). (modify_types_allowed): New function. Alter a mask of allowed types based on a bit mask of modifications. (neon_check_type): New function. Check the type of the current instruction against the variable argument list. The "key" type of the instruction is returned. (neon_dp_fixup): New function. Fill in and modify instruction bits for a Neon data-processing instruction depending on whether we're in ARM mode or Thumb-2 mode. (neon_logbits): New function. (neon_three_same, neon_two_same, do_neon_dyadic_i_su) (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm) (do_neon_qshl_imm, neon_cmode_for_logic_imm) (neon_bits_same_in_bytes, neon_squash_bits, neon_is_quarter_float) (neon_qfloat_bits, neon_cmode_for_move_imm, neon_write_immbits) (neon_invert_size, do_neon_logic, do_neon_bitfield, neon_dyadic) (do_neon_dyadic_if_su, do_neon_dyadic_if_su_d, do_neon_dyadic_if_i) (do_neon_dyadic_if_i_d, do_neon_addsub_if_i, neon_exchange_operands) (neon_compare, do_neon_cmp, do_neon_cmp_inv, do_neon_ceq) (neon_scalar_for_mul, neon_mul_mac, do_neon_mac_maybe_scalar) (do_neon_tst, do_neon_mul, do_neon_qdmulh, do_neon_fcmp_absolute) (do_neon_fcmp_absolute_inv, do_neon_step, do_neon_abs_neg) (do_neon_sli, do_neon_sri, do_neon_qshlu_imm, do_neon_qmovn) (do_neon_qmovun, do_neon_rshift_sat_narrow) (do_neon_rshift_sat_narrow_u, do_neon_movn, do_neon_rshift_narrow) (do_neon_shll, neon_cvt_flavour, do_neon_cvt, neon_move_immediate) (do_neon_mvn, neon_mixed_length, do_neon_dyadic_long, do_neon_abal) (neon_mac_reg_scalar_long, do_neon_mac_maybe_scalar_long) (do_neon_dyadic_wide, do_neon_vmull, do_neon_ext, do_neon_rev) (do_neon_dup, do_neon_mov, do_neon_rshift_round_imm, do_neon_movl) (do_neon_trn, do_neon_zip_uzp, do_neon_sat_abs_neg) (do_neon_pair_long, do_neon_recip_est, do_neon_cls, do_neon_clz) (do_neon_cnt, do_neon_swp, do_neon_tbl_tbx, do_neon_ldm_stm) (do_neon_ldr_str, do_neon_ld_st_interleave, neon_alignment_bit) (do_neon_ld_st_lane, do_neon_ld_dup, do_neon_ldx_stx): New functions. Neon bit encoding and encoding helpers. (parse_neon_type): New function. Parse Neon type specifier. (opcode_lookup): Allow parsing of Neon type specifiers. (REGNUM2, REGSETH, REGSET2): New macros. (reg_names): Add new VFPv3 and Neon registers. (NUF, nUF, NCE, nCE): New macros for opcode table. (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh, fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd, fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd. Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl, vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif, vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla, vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt, vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli, vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal, vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn, vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup, vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe, vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr, vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd], fto[us][lh][sd]. (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args. (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8. (arm_option_cpu_value): Add vfp3 and neon. (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix VFPv1 attribute. * gas/testsuite/gas/arm/copro.s: Avoid ldcl which encodes as a bad Neon instruction. * gas/testsuite/gas/arm/copro.d: Update accordingly. * gas/testsuite/gas/arm/neon-cond.s: New test. Conditional Neon opcodes in ARM mode. * gas/testsuite/gas/arm/neon-cond.d: Expected results of above. * gas/testsuite/gas/arm/neon-cov.s: New test. Coverage of Neon instructions. * gas/testsuite/gas/arm/neon-cov.d: Expected results of above. * gas/testsuite/gas/arm/neon-ldst-es.s: New test. Element and structure loads and stores. * gas/testsuite/gas/arm/neon-ldst-es.d: Expected results of above. * gas/testsuite/gas/arm/neon-ldst-rm.s: New test. Single and multiple register loads and stores. * gas/testsuite/gas/arm/neon-ldst-rm.d: Expected results of above. * gas/testsuite/gas/arm/neon-omit.s: New test. Omission of optional operands. * gas/testsuite/gas/arm/neon-omit.d: Expected results of above. * gas/testsuite/gas/arm/vfp1.d: Expect Neon syntax for some VFP instructions. * gas/testsuite/gas/arm/vfp1_t2.d: Likewise. * gas/testsuite/gas/arm/vfp1xD.d: Likewise. * gas/testsuite/gas/arm/vfp1xD_t2.d: Likewise. * gas/testsuite/gas/arm/vfp2.d: Likewise. * gas/testsuite/gas/arm/vfp2_t2.d: Likewise. * gas/testsuite/gas/arm/vfp3-32drs.s: New test. Extended D register range for VFP instructions. * gas/testsuite/gas/arm/vfp3-32drs.d: Expected results of above. * gas/testsuite/gas/arm/vfp3-const-conv.s: New test. VFPv3 constant-load and conversion instructions. * gas/testsuite/gas/arm/vfp3-const-conv.d: Expected results of above. * include/opcode/arm.h (FPU_VFP_EXT_V3): Define constant. (FPU_NEON_EXT_V1): Likewise. (FPU_VFP_HARD): Update. (FPU_VFP_V3): Define macro. (FPU_ARCH_VFP_V3, FPU_ARCH_VFP_V3_PLUS_NEON_V1): Define macros. * opcodes/arm-dis.c (coprocessor_opcodes): Add %A, %B, %k, convert %<code>[zy] into %[zy]<code>. Expand meaning of %<bitfield>['`?]. Add unified load/store instruction names. (neon_opcode_table): New. (arm_opcodes): Expand meaning of %<bitfield>['`?]. (arm_decode_bitfield): New. (print_insn_coprocessor): Add pc argument. Add %A & %B specifiers. Use arm_decode_bitfield and adjust numeric specifiers. Adjust %z & %y. (print_insn_neon): New. (print_insn_arm): Adjust print_insn_coprocessor call. Call print_insn_neon. Use arm_decode_bitfield and adjust numeric specifiers. (print_insn_thumb32): Likewise.
* 2005-04-01 Paul Brook <paul@codesourcery.com>Paul Brook2006-04-011-0/+4
| | | | * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
* * libiberty/configure.ac: Add cygpath for mingw hosts.Mark Mitchell2006-03-312-0/+53
| | | | | | | | | | | | | | | | | | | | | | | * libiberty.configure: Rebuilt. * libiberty/Makefile.in: Add cygpath. * libiberty/cygpath.c: New. * include/libiberty.h (pex_write_input): New declaration. * libiberty/pex-common.c (pex_write_input): New function. * libiberty/pexecute.txh (pex_write_input): Document it. * libiberty/pex-common.h (struct pex_funcs): New function ptr fdopenw. * libiberty/pex-unix.c (pex_unix_fdopenw): New function. (funcs): List it as our fdopenw function. * libiberty/pex-win32.c (pex_win32_fdopenw): New function. (funcs): List it as our fdopenw function. * libiberty/pex-djgpp.c (funcs): Leave fdopenw null. * libiberty/pex-msdos (funcs): Same. * libiberty/functions.texi: Regenerated. * libiberty/pex-common.h (struct pex_obj): Doc fixes. * libiberty/functions.texi: Regenerate.
* * libiberty/pex-win32.c (pex_win32_exec_child): Close stdout/stderrMark Mitchell2006-03-271-0/+5
| | | | in parent.
* * gas/config/tc-m68k.c (m68k_init_arch): Move checking ofNathan Sidwell2006-03-261-0/+5
| | | | cfloat/m68881 to correct architecture before using it.
* 2006-03-21 Paul Brook <paul@codesourcery.com>Paul Brook2006-03-211-0/+4
| | | | * gas/config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
* * gas/config/tc-m68k.c (find_cf_chip): Merge into ...Nathan Sidwell2006-03-211-0/+4
| | | | | (m68k_ip): ... here. Use for all chips. Protect against buffer overrun and avoid excessive copying.
* * gcc/config/tc-m68k.c (m68000_control_regs, m68010_control_regs,Nathan Sidwell2006-03-212-38/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | m68020_control_regs, m68040_control_regs, m68060_control_regs, mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs, mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs, mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ... (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl, mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl, mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl, mcf5282_ctrl, mcfv4e_ctrl): ... these. (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New. (struct m68k_cpu): Change chip field to control_regs. (current_chip): Remove. (control_regs): New. (m68k_archs, m68k_extensions): Adjust. (m68k_cpus): Reorder to be in cpu number order. Adjust. (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove. (find_cf_chip): Reimplement for new organization of cpu table. (select_control_regs): Remove. (mri_chip): Adjust. (struct save_opts): Save control regs, not chip. (s_save, s_restore): Adjust. (m68k_lookup_cpu): Give deprecated warning when necessary. (m68k_init_arch): Adjust. (md_show_usage): Adjust for new cpu table organization. * include/opcode/m68k.h (cpu_m68k, cpu_cf, cpu_m68000, cpu_m68008, cpu_m68010, cpu_m68020, cpu_m68ec030, cpu_m68040, cpu_m68060, cpu_m68851, cpu_m68881, cpu_m68882, cpu_cpu32, cpu_cf5200, cpu_cf5206e, cpu_cf5208, cpu_cf521x, cpu_cf5213, cpu_cf5249, cpu_cf528x, cpu_cf5307, cpu_cf5329, cpu_cf5407, cpu_cf547x, cpu_cf548x): Remove.
* * libiberty/pex-win32.c (<errno.h>): Include.Mark Mitchell2006-03-211-0/+13
| | | | | | | | | | | | (fix_argv): Remove. (argv_to_cmdline): New function. (std_suffixes): New variable. (no_suffixes): Likewise. (find_executable): New function. (win32_spawn): Likewise. (spawn_script): Use win32_spawn instead of _spawnv[p]. (pex_win32_exec_child): Replace MSVCRT calls with Win32 API calls. (pex_win32_wait): Likewise.
* bfd/Richard Sandiford2006-03-211-0/+20
| | | | | | | | | | | | | | | | | | | | * cpu-m68k.c (bfd_m68k_compatible): Treat ISA A+ and ISA B code as incompatible. Likewise MAC and EMAC code. * elf32-m68k.c (elf32_m68k_merge_private_bfd_data): Use bfd_get_compatible to set the new bfd architecture. Rely on it to detect incompatibilities. gas/ * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use mcfemac instead of mcfmac. ld/testsuite/ * ld-m68k/merge-error-1a.s, ld-m68k/merge-error-1b.s, * ld-m68k/merge-error-1a.d, ld-m68k/merge-error-1b.d, * ld-m68k/merge-error-1c.d, ld-m68k/merge-error-1d.d, * ld-m68k/merge-error-1e.d, ld-m68k/merge-ok-1a.d, * ld-m68k/merge-ok-1b.d: New tests. * ld-m68k/m68k.exp: Run them.
* 2006-03-20 Paul Brook <paul@codesourcery.com>Paul Brook2006-03-201-0/+5
| | | | | * gas/config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt. * gas/testsuite/gas/arm/thumb32.d: Correct expected output.
* 2006-03-20 Paul Brook <paul@codesourcery.com>Paul Brook2006-03-201-0/+4
| | | | * gas/config/tc-arm.c (parse_operands): Set default error message.
* 2006-03-20 Paul Brook <paul@codesourcery.com>Paul Brook2006-03-201-0/+4
| | | | * gas/config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
* 2006-03-20 Paul Brook <paul@codesourcery.com>Paul Brook2006-03-201-5/+11
| | | | | | | * gas/config/tc-arm.c (md_apply_fix): Set H bit on blx instruction. * gas/testsuite/gas/arm/blx-local.d: New test. * gas/testsuite/gas/arm/blx-local.d: New test.
* 2006-03-20 Paul Brook <paul@codesourcery.com>Paul Brook2006-03-201-1/+9
| | | | | | | | | | gas/ * config/tc-arm.c (THUMB2_LOAD_BIT): Define. (move_or_literal_pool): Handle Thumb-2 instructions. (do_t_ldst): Call move_or_literal_pool for =N addressing modes. gas/testsuite/ * gas/arm/thumb2_pool.d: New test. * gas/arm/thumb2_pool.s: New test.
* newNathan Sidwell2006-03-201-0/+1
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* This commit was manufactured by cvs2svn to create branch 'binutils-csl-binutils-csl-2_17-branchpointcvs2svn2006-03-2013-206/+403
| | | | | | | | | | | | | | | | | | | 2_17-branch'. Sprout from gdb-csl-available-20060303-branch 2006-03-03 15:25:31 UTC cvs2svn 'This commit was manufactured by cvs2svn to create branch 'gdb-csl-' Cherrypick from master 2006-03-20 01:07:29 UTC John David Anglin <dave.anglin@nrc-cnrc.gc.ca> ' * hppa.h (SHF_HP_TLS, SHF_HP_NEAR_SHARED, SHF_HP_FAR_SHARED,': ChangeLog Makefile.in Makefile.tpl compile configure configure.in include/elf/ChangeLog include/elf/arm.h include/elf/hppa.h include/elf/m68k.h include/opcode/ChangeLog include/opcode/arm.h include/opcode/hppa.h
* This commit was manufactured by cvs2svn to create branch 'gdb-csl-gdb-csl-available-20060303-branchpointcvs2svn2006-03-0312-26/+207
| | | | | | | | | | | | | | | | | | available-20060303-branch'. Sprout from gdb-csl-20060226-branch 2006-02-24 22:10:36 UTC cvs2svn 'This commit was manufactured by cvs2svn to create branch 'gdb-' Cherrypick from master 2006-03-03 15:25:30 UTC Nick Clifton <nickc@redhat.com> 'Add linker relaxation support for the AVR': ChangeLog MAINTAINERS etc/ChangeLog etc/Makefile.in etc/configure.texi etc/standards.texi include/elf/ChangeLog include/elf/avr.h include/elf/dwarf2.h include/opcode/ChangeLog include/opcode/i386.h ltmain.sh
* This commit was manufactured by cvs2svn to create branch 'gdb-gdb-csl-20060226-branchpointcvs2svn2006-02-245312-1335589/+0
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| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | csl-20060226-branch'. Sprout from master 2006-02-24 22:10:35 UTC DJ Delorie <dj@redhat.com> '[include/elf]' Cherrypick from cygnus 1999-05-03 07:29:06 UTC Richard Henderson <rth@redhat.com> '19990502 sourceware import': README config/mh-armpic config/mh-elfalphapic config/mh-m68kpic config/mh-papic config/mh-ppcpic config/mh-x86pic config/mt-d30v config/mt-netware config/mt-ospace etc/add-log.el etc/add-log.vi etc/configbuild.ein etc/configbuild.fig etc/configbuild.jin etc/configbuild.tin etc/configdev.ein etc/configdev.fig etc/configdev.jin etc/configdev.tin etc/configure etc/configure.in include/aout/hppa.h include/coff/sym.h include/fopen-bin.h include/fopen-same.h include/fopen-vms.h include/opcode/tahoe.h makefile.vms Delete: compile libgloss/ChangeLog libgloss/Makefile.in libgloss/README libgloss/arm/Makefile.in libgloss/arm/coff-iq80310.specs libgloss/arm/coff-pid.specs libgloss/arm/coff-rdimon.specs libgloss/arm/coff-rdpmon.specs libgloss/arm/coff-redboot.ld libgloss/arm/coff-redboot.specs libgloss/arm/configure libgloss/arm/configure.in libgloss/arm/crt0.S libgloss/arm/elf-iq80310.specs libgloss/arm/elf-pid.specs libgloss/arm/elf-rdimon.specs libgloss/arm/elf-rdpmon.specs libgloss/arm/elf-redboot.ld libgloss/arm/elf-redboot.specs libgloss/arm/libcfunc.c libgloss/arm/redboot-crt0.S libgloss/arm/redboot-syscalls.c libgloss/arm/swi.h libgloss/arm/syscall.h libgloss/arm/syscalls.c libgloss/arm/trap.S libgloss/close.c libgloss/config/default.mh libgloss/config/default.mt libgloss/config/dos.mh libgloss/config/mips.mt libgloss/config/mn10200.mt libgloss/config/mn10300.mt libgloss/config/ppc.mh libgloss/configure libgloss/configure.in libgloss/cris/Makefile.in libgloss/cris/configure libgloss/cris/configure.in libgloss/cris/crt0.S libgloss/cris/crti.c libgloss/cris/crtn.c libgloss/cris/gensyscalls libgloss/cris/lcrt0.c libgloss/cris/linunistd.h libgloss/cris/outbyte.c libgloss/cris/setup.S libgloss/crx/Makefile.in libgloss/crx/_exit.c libgloss/crx/_getenv.c libgloss/crx/_rename.c libgloss/crx/close.c libgloss/crx/configure libgloss/crx/configure.in libgloss/crx/crt0.S libgloss/crx/crti.S libgloss/crx/crtn.S libgloss/crx/dvz_hndl.c libgloss/crx/flg_hndl.c libgloss/crx/fstat.c libgloss/crx/getpid.c libgloss/crx/iad_hndl.c libgloss/crx/intable.c libgloss/crx/isatty.c libgloss/crx/kill.c libgloss/crx/lseek.c libgloss/crx/open.c libgloss/crx/putnum.c libgloss/crx/read.c libgloss/crx/sbrk.c libgloss/crx/sim.ld libgloss/crx/stat.c libgloss/crx/svc_hndl.c libgloss/crx/time.c libgloss/crx/und_hndl.c libgloss/crx/unlink.c libgloss/crx/write.c libgloss/d30v/Makefile.in libgloss/d30v/configure libgloss/d30v/configure.in libgloss/d30v/crt0.S libgloss/d30v/inbyte.c libgloss/d30v/outbyte.c libgloss/d30v/syscalls.c libgloss/debug.c libgloss/debug.h libgloss/doc/Makefile.in libgloss/doc/configure libgloss/doc/configure.in libgloss/doc/porting.texi libgloss/fr30/Makefile.in libgloss/fr30/configure libgloss/fr30/configure.in libgloss/fr30/crt0.s libgloss/fr30/syscalls.c libgloss/frv/Makefile.in libgloss/frv/configure libgloss/frv/configure.in libgloss/frv/crt0.S libgloss/frv/fstat.c libgloss/frv/getpid.c libgloss/frv/isatty.c libgloss/frv/kill.c libgloss/frv/print.c libgloss/frv/putnum.c libgloss/frv/sbrk.c libgloss/frv/sim-close.S libgloss/frv/sim-exit.S libgloss/frv/sim-inbyte.c libgloss/frv/sim-lseek.S libgloss/frv/sim-open.S libgloss/frv/sim-read.S libgloss/frv/sim-time.c libgloss/frv/sim-unlink.S libgloss/frv/sim-write.S libgloss/frv/stat.c libgloss/fstat.c libgloss/getpid.c libgloss/glue.h libgloss/hp74x/Makefile.in libgloss/hp74x/README libgloss/hp74x/checksum.c libgloss/hp74x/configure libgloss/hp74x/configure.in libgloss/hp74x/crt0.s libgloss/hp74x/debugger.h libgloss/hp74x/debugger.s libgloss/hp74x/diagnose.h libgloss/hp74x/hppa-defs.h libgloss/hp74x/hppa.ld libgloss/hp74x/io.c libgloss/hp74x/iva_table.h libgloss/hp74x/iva_table.s libgloss/hp74x/pa_stub.c libgloss/hp74x/test.c libgloss/i386/Makefile.in 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newlib/libc/sys/linux/net/res_debug.c newlib/libc/sys/linux/net/res_init.c newlib/libc/sys/linux/net/res_mkquery.c newlib/libc/sys/linux/net/res_mkupdate.c newlib/libc/sys/linux/net/res_query.c newlib/libc/sys/linux/net/res_send.c newlib/libc/sys/linux/net/res_update.c newlib/libc/sys/linux/net/resolver.3 newlib/libc/sys/linux/net/rthdr.c newlib/libc/sys/linux/net/send.c newlib/libc/sys/linux/net/un-namespace.h newlib/libc/sys/linux/net/vars.c newlib/libc/sys/linux/ntp_gettime.c newlib/libc/sys/linux/pathconf.c newlib/libc/sys/linux/pread.c newlib/libc/sys/linux/pread64.c newlib/libc/sys/linux/process.c newlib/libc/sys/linux/prof-freq.c newlib/libc/sys/linux/profile.c newlib/libc/sys/linux/psignal.c newlib/libc/sys/linux/pvallocr.c newlib/libc/sys/linux/pwrite.c newlib/libc/sys/linux/pwrite64.c newlib/libc/sys/linux/raise.c newlib/libc/sys/linux/readdir64.c newlib/libc/sys/linux/realloc.c newlib/libc/sys/linux/reallocr.c newlib/libc/sys/linux/realpath.c newlib/libc/sys/linux/rename.c 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newlib/libc/sys/netware/Makefile.in newlib/libc/sys/netware/aclocal.m4 newlib/libc/sys/netware/configure newlib/libc/sys/netware/configure.in newlib/libc/sys/netware/crt0.c newlib/libc/sys/netware/getpid.c newlib/libc/sys/netware/link.c newlib/libc/sys/rdos/Makefile.am newlib/libc/sys/rdos/Makefile.in newlib/libc/sys/rdos/aclocal.m4 newlib/libc/sys/rdos/chown.c newlib/libc/sys/rdos/close.c newlib/libc/sys/rdos/config.h newlib/libc/sys/rdos/configure newlib/libc/sys/rdos/configure.in newlib/libc/sys/rdos/crt0.S newlib/libc/sys/rdos/execve.c newlib/libc/sys/rdos/fork.c newlib/libc/sys/rdos/fstat.c newlib/libc/sys/rdos/getenv.c newlib/libc/sys/rdos/getpid.c newlib/libc/sys/rdos/gettod.c newlib/libc/sys/rdos/isatty.c newlib/libc/sys/rdos/kill.c newlib/libc/sys/rdos/link.c newlib/libc/sys/rdos/lseek.c newlib/libc/sys/rdos/open.c newlib/libc/sys/rdos/rdos.S newlib/libc/sys/rdos/rdos.h newlib/libc/sys/rdos/rdoshelp.c newlib/libc/sys/rdos/read.c newlib/libc/sys/rdos/readlink.c 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winsup/w32api/include/winreg.h winsup/w32api/include/winresrc.h winsup/w32api/include/winsnmp.h winsup/w32api/include/winsock.h winsup/w32api/include/winsock2.h winsup/w32api/include/winspool.h winsup/w32api/include/winsvc.h winsup/w32api/include/winuser.h winsup/w32api/include/winver.h winsup/w32api/include/ws2spi.h winsup/w32api/include/ws2tcpip.h winsup/w32api/include/wsahelp.h winsup/w32api/include/wsipx.h winsup/w32api/include/wsnetbs.h winsup/w32api/include/wtypes.h winsup/w32api/include/zmouse.h winsup/w32api/install-sh winsup/w32api/lib/Makefile.in winsup/w32api/lib/aclui.def winsup/w32api/lib/advapi32.def winsup/w32api/lib/avicap32.def winsup/w32api/lib/avifil32.def winsup/w32api/lib/cap.def winsup/w32api/lib/comctl32.def winsup/w32api/lib/comdlg32.def winsup/w32api/lib/crypt32.def winsup/w32api/lib/ctl3d32.def winsup/w32api/lib/ddk/Makefile.in winsup/w32api/lib/ddk/apcups.def winsup/w32api/lib/ddk/cfgmgr32.def winsup/w32api/lib/ddk/dxapi.def winsup/w32api/lib/ddk/hal.def winsup/w32api/lib/ddk/hid.def winsup/w32api/lib/ddk/hidparse.def winsup/w32api/lib/ddk/mcd.def winsup/w32api/lib/ddk/ndis.def winsup/w32api/lib/ddk/newdev.def winsup/w32api/lib/ddk/ntoskrnl.def winsup/w32api/lib/ddk/scsiport.def winsup/w32api/lib/ddk/tdi.def winsup/w32api/lib/ddk/usbcamd.def winsup/w32api/lib/ddk/usbcamd2.def winsup/w32api/lib/ddk/videoprt.def winsup/w32api/lib/ddk/win32k.def winsup/w32api/lib/dhcpcsvc.def winsup/w32api/lib/directx/Makefile.in winsup/w32api/lib/directx/d3d8.def winsup/w32api/lib/directx/d3d9.def winsup/w32api/lib/directx/d3dim.def winsup/w32api/lib/directx/d3drm.def winsup/w32api/lib/directx/d3dx8d.def winsup/w32api/lib/directx/d3dx9d.def winsup/w32api/lib/directx/d3dxof.def winsup/w32api/lib/directx/ddraw.def winsup/w32api/lib/directx/dinput.def winsup/w32api/lib/directx/dinput8.def winsup/w32api/lib/directx/dinput_joy.c winsup/w32api/lib/directx/dinput_joy2.c winsup/w32api/lib/directx/dinput_kbd.c winsup/w32api/lib/directx/dinput_mouse.c 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* [include/elf]DJ Delorie2006-02-242-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * m32c.h: Add relax relocs. [cpu] * m32c.cpu (RL_TYPE): New attribute, with macros. (Lab-8-24): Add RELAX. (unary-insn-defn-g, binary-arith-imm-dst-defn, binary-arith-imm4-dst-defn): Add 1ADDR attribute. (binary-arith-src-dst-defn): Add 2ADDR attribute. (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a, jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP attribute. (jsri16, jsri32): Add 1ADDR attribute. (jsr32.w, jsr32.a): Add JUMP attribute. [opcodes] * m32c-desc.c: Regenerate with linker relaxation attributes. * m32c-desc.h: Likewise. * m32c-dis.c: Likewise. * m32c-opc.c: Likewise. [gas] * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix. (tc_gen_reloc): Don't define. * config/tc-m32c.c (rl_for, relaxable): New convenience macros. (OPTION_LINKRELAX): New. (md_longopts): Add it. (m32c_relax): New. (md_parse_options): Set it. (md_assemble): Emit relaxation relocs as needed. (md_convert_frag): Emit relaxation relocs as needed. (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16. (m32c_apply_fix): New. (tc_gen_reloc): New. (m32c_force_relocation): Force out jump relocs when relaxing. (m32c_fix_adjustable): Return false if relaxing. [bfd] * elf32-m32c.c (m32c_elf_howto_table): Add relaxation relocs. (m32c_elf_relocate_section): Don't relocate them. (compare_reloc): New. (relax_reloc): Remove. (m32c_offset_for_reloc): New. (m16c_addr_encodings): New. (m16c_jmpaddr_encodings): New. (m32c_addr_encodings): New. (m32c_elf_relax_section): Relax jumps and address displacements. (m32c_elf_relax_delete_bytes): Adjust for internal syms. Fix up short jumps. * reloc.c: Add m32c relax relocs. * libbfd.h: Regenerate.
* * sigproc.cc (sigheld): Define new variable.Christopher Faylor2006-02-242-3/+26
| | | | | | (sig_dispatch_pending): Don't check sigq since that's racy. (sig_send): Set sigheld flag if __SIGHOLD is specified, reset it if __SIGNOHOLD is specified. Ignore flush signals if we're holding signals.
* 2006-02-24 Paul Brook <paul@codesourcery.com>Jeff Johnston2006-02-242-0/+8
| | | | * arm/redboot-crt0.S: Use cps in Thumb-2 mode.
* 2006-02-24 Paul Brook <paul@codesourcery.com>Paul Brook2006-02-242-5/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | gas/ * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7, arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables. (struct asm_barrier_opt): Define. (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables. (parse_psr): Accept V7M psr names. (parse_barrier): New function. (enum operand_parse_code): Add OP_oBARRIER. (parse_operands): Implement OP_oBARRIER. (do_barrier): New function. (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions. (do_t_cpsi): Add V7M restrictions. (do_t_mrs, do_t_msr): Validate V7M variants. (md_assemble): Check for NULL variants. (v7m_psrs, barrier_opt_names): New tables. (insns): Add V7 instructions. Mark V6 instructions absent from V7M. (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh. (arm_cpu_option_table): Add Cortex-M3, R4 and A8. (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m. (struct cpu_arch_ver_table): Define. (cpu_arch_ver): New. (aeabi_set_public_attributes): Use cpu_arch_ver. Set Tag_CPU_arch_profile. * doc/c-arm.texi: Document new cpu and arch options. gas/testsuite/ * gas/arm/thumb32.d: Fix expected msr and mrs output. * gas/arm/arch7.d: New test. * gas/arm/arch7.s: New test. * gas/arm/arch7m-bad.l: New test. * gas/arm/arch7m-bad.d: New test. * gas/arm/arch7m-bad.s: New test. include/opcode/ * arm.h: Add V7 feature bits. opcodes/ * arm-dis.c (arm_opcodes): Add V7 instructions. (thumb32_opcodes): Ditto. Handle V7M MSR/MRS variants. (print_arm_address): New function. (print_insn_arm): Use it. Add 'P' and 'U' cases. (psr_name): New function. (print_insn_thumb32): Add 'U', 'C' and 'D' cases.
* * cygwin.din (_exit): Use signal front end.Christopher Faylor2006-02-242-2/+7
| | | | (exit): Ditto.
* bfd/H.J. Lu2006-02-232-2/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 2006-02-23 H.J. Lu <hongjiu.lu@intel.com> * cpu-ia64-opc.c (ins_immu5b): New. (ext_immu5b): Likewise. (elf64_ia64_operands): Add IMMU5b. gas/ 2006-02-23 H.J. Lu <hongjiu.lu@intel.com> * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b. gas/testsuite/ 2006-02-23 H.J. Lu <hongjiu.lu@intel.com> * gas/ia64/opc-i.s: Add tests for tf. * gas/ia64/pseudo.s: Likewise. * gas/ia64/opc-i.d: Updated. * gas/ia64/pseudo.d: Likewise. include/opcode/ 2006-02-23 H.J. Lu <hongjiu.lu@intel.com> * ia64.h (ia64_opnd): Add IA64_OPND_IMMU5b. opcodes/ 2006-02-23 H.J. Lu <hongjiu.lu@intel.com> * ia64-opc-i.c (bXc): New. (mXc): Likewise. (OpX2TaTbYaXcC): Likewise. (TF). Likewise. (TFCM). Likewise. (ia64_opcodes_i): Add instructions for tf. * ia64-opc.h (IMMU5b): New. * ia64-asmtab.c: Regenerated.
* * winsup.h (cygwin_hmodule): Declare.Christopher Faylor2006-02-235-10/+29
| | | | | | | | | * exceptions.cc (inside_kernel): Reverse return values to reflect function name. Return true if we're in cygwin1.dll or if we're executing in dll_entry. (_cygtls::interrupt_now): Reflect reversal of inside_kernel return value. * hookapi.cc (cygwin_hmodule): Remove declaration. * init.cc (dll_entry): Use in_dllentry global to record that we are executing in dllentry.
* 2006-02-22 Nathan Sidwell <nathan@codesourcery.com>Jeff Johnston2006-02-224-2/+144
| | | | | | | | | | * m68k/Makefile.in (CF_SCRIPTS): New. (all): Add CF_SCRIPTS. (m5208evb.ld, m5213evb.ld, m5235evb.ld, m5272c3.ld, m5282evb.ld): New targets (install): Iterate over CF_SCRIPTS. * m68k/crt0.S: Don't use dbra on any cf chips. * m68k/dbug-cf.sc: New.
* * exceptions.cc (_cygtls::interrupt_now): Reorder conditionalCorinna Vinschen2006-02-222-1/+6
| | | | to call inside_kernel only if this isn't locked.
* * fhandler.cc (fhandler_base::open): Add FILE_READ_ATTRIBUTES toCorinna Vinschen2006-02-222-2/+8
| | | | | access flags in case of query_read_control case, add FILE_READ_DATA in case of query_stat_control.
* * include/ddk/ntifs,h (FILE_ID_FULL_DIRECTORY_INFORMATION): RevertDanny Smith2006-02-212-5/+6
| | | | | last change. Remove file level #pragma pack(push,4)/#pragma pop.
generated by cgit v1.2.3 (git 2.25.1) at 2024-06-07 06:42:39 +0000