diff options
Diffstat (limited to 'include/opcode')
| -rw-r--r-- | include/opcode/ChangeLog | 10 | ||||
| -rw-r--r-- | include/opcode/arm.h | 5 | ||||
| -rw-r--r-- | include/opcode/crx.h | 7 |
3 files changed, 3 insertions, 19 deletions
diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog index 4eb834853..462165c45 100644 --- a/include/opcode/ChangeLog +++ b/include/opcode/ChangeLog @@ -1,13 +1,3 @@ -2004-10-07 Tomer Levi <Tomer.Levi@nsc.com> - - * crx.h: Add COPS_REG_INS - Coprocessor Special register - instruction type. - -2004-09-30 Paul Brook <paul@codesourcery.com> - - * arm.h (ARM_EXT_V6K, ARM_EXT_V6Z): Define. - (ARM_ARCH_V6K, ARM_ARCH_V6Z, ARM_ARCH_V6ZK): Define. - 2004-09-11 Theodore A. Roth <troth@openavr.org> * avr.h: Add support for diff --git a/include/opcode/arm.h b/include/opcode/arm.h index dd90e2ac6..6ccccbd4e 100644 --- a/include/opcode/arm.h +++ b/include/opcode/arm.h @@ -32,8 +32,6 @@ #define ARM_EXT_V5E 0x00000400 /* DSP Double transfers. */ #define ARM_EXT_V5J 0x00000800 /* Jazelle extension. */ #define ARM_EXT_V6 0x00001000 /* ARM V6. */ -#define ARM_EXT_V6K 0x00002000 /* ARM V6K. */ -#define ARM_EXT_V6Z 0x00004000 /* ARM V6Z. */ /* Co-processor space extensions. */ #define ARM_CEXT_XSCALE 0x00800000 /* Allow MIA etc. */ @@ -62,9 +60,6 @@ #define ARM_ARCH_V5TE (ARM_ARCH_V5TExP | ARM_EXT_V5E) #define ARM_ARCH_V5TEJ (ARM_ARCH_V5TE | ARM_EXT_V5J) #define ARM_ARCH_V6 (ARM_ARCH_V5TEJ | ARM_EXT_V6) -#define ARM_ARCH_V6K (ARM_ARCH_V6 | ARM_EXT_V6K) -#define ARM_ARCH_V6Z (ARM_ARCH_V6 | ARM_EXT_V6Z) -#define ARM_ARCH_V6ZK (ARM_ARCH_V6 | ARM_EXT_V6K | ARM_EXT_V6Z) /* Processors with specific extensions in the co-processor space. */ #define ARM_ARCH_XSCALE (ARM_ARCH_V5TE | ARM_CEXT_XSCALE) diff --git a/include/opcode/crx.h b/include/opcode/crx.h index 58db2f8b3..1e0d5733a 100644 --- a/include/opcode/crx.h +++ b/include/opcode/crx.h @@ -168,10 +168,9 @@ operand_type; #define DIV_INS 14 #define COP_BRANCH_INS 15 #define COP_REG_INS 16 -#define COPS_REG_INS 17 -#define DCR_BRANCH_INS 18 -#define MMC_INS 19 -#define MMU_INS 20 +#define DCR_BRANCH_INS 17 +#define MMC_INS 18 +#define MMU_INS 19 /* Maximum value supported for instruction types. */ #define CRX_INS_MAX (1 << 5) |