diff options
| -rw-r--r-- | include/elf/ChangeLog | 5 | ||||
| -rw-r--r-- | include/elf/mips.h | 2 | ||||
| -rw-r--r-- | include/opcode/ChangeLog | 8 | ||||
| -rw-r--r-- | include/opcode/mips.h | 10 |
4 files changed, 25 insertions, 0 deletions
diff --git a/include/elf/ChangeLog b/include/elf/ChangeLog index ded671263..dd46a1187 100644 --- a/include/elf/ChangeLog +++ b/include/elf/ChangeLog @@ -1,3 +1,8 @@ +2007-11-29 Mark Shinwell <shinwell@codesourcery.com> + + * mips.h (E_MIPS_MACH_LS2E): New. + (E_MIPS_MACH_LS2F): New. + 2007-11-28 Nathan Sidwell <nathan@codesourcery.com> * internal.h (ELF_IS_SECTION_IN_SEGMENT): Adjust to cope with diff --git a/include/elf/mips.h b/include/elf/mips.h index f54ef70ba..63a97187f 100644 --- a/include/elf/mips.h +++ b/include/elf/mips.h @@ -216,6 +216,8 @@ END_RELOC_NUMBERS (R_MIPS_maxext) #define E_MIPS_MACH_5400 0x00910000 #define E_MIPS_MACH_5500 0x00980000 #define E_MIPS_MACH_9000 0x00990000 +#define E_MIPS_MACH_LS2E 0x00A00000 +#define E_MIPS_MACH_LS2F 0x00A10000 /* Processor specific section indices. These sections do not actually exist. Symbols with a st_shndx field corresponding to one of these diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog index dd37f6c90..afd480b13 100644 --- a/include/opcode/ChangeLog +++ b/include/opcode/ChangeLog @@ -1,5 +1,13 @@ 2007-11-29 Mark Shinwell <shinwell@codesourcery.com> + * mips.h (INSN_LOONGSON_2E): New. + (INSN_LOONGSON_2F): New. + (CPU_LOONGSON_2E): New. + (CPU_LOONGSON_2F): New. + (OPCODE_IS_MEMBER): Update for Loongson-2E and -2F flags. + +2007-11-29 Mark Shinwell <shinwell@codesourcery.com> + * mips.h (INSN_ISA*): Redefine certain values as an enumeration. Update comments. (mips_isa_table): New. diff --git a/include/opcode/mips.h b/include/opcode/mips.h index d74dccd94..20638d8a6 100644 --- a/include/opcode/mips.h +++ b/include/opcode/mips.h @@ -552,6 +552,10 @@ static const unsigned int mips_isa_table[] = #define INSN_SMARTMIPS 0x10000000 /* DSP R2 ASE */ #define INSN_DSPR2 0x20000000 +/* ST Microelectronics Loongson 2E. */ +#define INSN_LOONGSON_2E 0x40000000 +/* ST Microelectronics Loongson 2F. */ +#define INSN_LOONGSON_2F 0x80000000 /* MIPS ISA defines, use instead of hardcoding ISA level. */ @@ -599,6 +603,8 @@ static const unsigned int mips_isa_table[] = #define CPU_MIPS64 64 #define CPU_MIPS64R2 65 #define CPU_SB1 12310201 /* octal 'SB', 01. */ +#define CPU_LOONGSON_2E 3001 +#define CPU_LOONGSON_2F 3002 /* Test for membership in an ISA including chip specific ISAs. INSN is pointer to an element of the opcode table; ISA is the specified @@ -625,6 +631,10 @@ static const unsigned int mips_isa_table[] = || (cpu == CPU_VR4120 && ((insn)->membership & INSN_4120) != 0) \ || (cpu == CPU_VR5400 && ((insn)->membership & INSN_5400) != 0) \ || (cpu == CPU_VR5500 && ((insn)->membership & INSN_5500) != 0) \ + || (cpu == CPU_LOONGSON_2E \ + && ((insn)->membership & INSN_LOONGSON_2E) != 0) \ + || (cpu == CPU_LOONGSON_2F \ + && ((insn)->membership & INSN_LOONGSON_2F) != 0) \ || 0) /* Please keep this term for easier source merging. */ /* This is a list of macro expanded instructions. |