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authorRichard Sandiford <rdsandiford@googlemail.com>2002-09-30 11:58:09 +0000
committerRichard Sandiford <rdsandiford@googlemail.com>2002-09-30 11:58:09 +0000
commitbf42f57df6044248fca2c530a4b7b9e1a55d3f0c (patch)
treee4f3327c5cfa4b283fcca9da4c0609f359e5e149 /winsup/cygserver/cygserver.cc
parent3342a2e92879f6dfb0eb6d1f8edc8b088f303900 (diff)
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[include/opcode/]
* mips.h: Update comment for new opcodes. (OP_MASK_VECBYTE, OP_SH_VECBYTE): New. (OP_MASK_VECALIGN, OP_SH_VECALIGN): New. (INSN_4111, INSN_4120, INSN_5400, INSN_5500): New. (CPU_VR4120, CPU_VR5400, CPU_VR5500): New. (OPCODE_IS_MEMBER): Handle the new CPU_* values and INSN_* flags. Don't match CPU_R4111 with INSN_4100. [opcodes/] * mips-dis.c (print_insn_arg): Handle '[', ']', 'e' and '%'. (mips_isa_type): Handle bfd_mach_mips4120, bfd_mach_mips5400 and bfd_mach_mips5500. * mips-opc.c (V1): Include INSN_4111 and INSN_4120. (N411, N412, N5, N54, N55): New convenience defines. (mips_builtin_opcodes): Add vr4120, vr5400 and vr5500 opcodes. Change dmadd16 and madd16 from V1 to N411.
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