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author | cvs2svn <> | 2013-09-17 21:05:56 +0000 |
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committer | cvs2svn <> | 2013-09-17 21:05:56 +0000 |
commit | 903fedc1b99cb0549e9de2190e99785f8e22a5a2 (patch) | |
tree | ca97ecca2fc40ccc5b9028fa2e7bb4013d772e98 /include/opcode/msp430.h | |
parent | 073b57175fab28f52a0f407855ff587d3991faae (diff) | |
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This commit was manufactured by cvs2svn to create tag 'cgen-cgen-snapshot-20130901
snapshot-20130901'.
Sprout from binutils-2_24-branch 2013-09-17 21:05:50 UTC cvs2svn 'This commit was manufactured by cvs2svn to create branch 'binutils-'
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include/cgen/basic-ops.h
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include/coff/ChangeLog-9103
include/coff/alpha.h
include/coff/apollo.h
include/coff/arm.h
include/coff/aux-coff.h
include/coff/ecoff.h
include/coff/external.h
include/coff/go32exe.h
include/coff/h8300.h
include/coff/h8500.h
include/coff/i386.h
include/coff/i860.h
include/coff/i960.h
include/coff/ia64.h
include/coff/internal.h
include/coff/m68k.h
include/coff/m88k.h
include/coff/mcore.h
include/coff/mips.h
include/coff/mipspe.h
include/coff/or32.h
include/coff/pe.h
include/coff/powerpc.h
include/coff/rs6000.h
include/coff/rs6k64.h
include/coff/sh.h
include/coff/sparc.h
include/coff/sym.h
include/coff/symconst.h
include/coff/ti.h
include/coff/tic30.h
include/coff/tic4x.h
include/coff/tic54x.h
include/coff/tic80.h
include/coff/w65.h
include/coff/we32k.h
include/coff/x86_64.h
include/coff/xcoff.h
include/coff/z80.h
include/coff/z8k.h
include/demangle.h
include/dis-asm.h
include/dwarf2.def
include/dwarf2.h
include/dyn-string.h
include/elf/ChangeLog
include/elf/ChangeLog-9103
include/elf/aarch64.h
include/elf/alpha.h
include/elf/arc.h
include/elf/arm.h
include/elf/avr.h
include/elf/bfin.h
include/elf/common.h
include/elf/cr16.h
include/elf/cr16c.h
include/elf/cris.h
include/elf/crx.h
include/elf/d10v.h
include/elf/d30v.h
include/elf/dlx.h
include/elf/dwarf.h
include/elf/epiphany.h
include/elf/external.h
include/elf/fr30.h
include/elf/frv.h
include/elf/h8.h
include/elf/hppa.h
include/elf/i370.h
include/elf/i386.h
include/elf/i860.h
include/elf/i960.h
include/elf/ia64.h
include/elf/internal.h
include/elf/ip2k.h
include/elf/iq2000.h
include/elf/lm32.h
include/elf/m32c.h
include/elf/m32r.h
include/elf/m68hc11.h
include/elf/m68k.h
include/elf/mcore.h
include/elf/mep.h
include/elf/metag.h
include/elf/microblaze.h
include/elf/mips.h
include/elf/mmix.h
include/elf/mn10200.h
include/elf/mn10300.h
include/elf/moxie.h
include/elf/msp430.h
include/elf/mt.h
include/elf/nios2.h
include/elf/openrisc.h
include/elf/or32.h
include/elf/pj.h
include/elf/ppc.h
include/elf/ppc64.h
include/elf/reloc-macros.h
include/elf/rl78.h
include/elf/rx.h
include/elf/s390.h
include/elf/score.h
include/elf/sh.h
include/elf/sparc.h
include/elf/spu.h
include/elf/tic6x-attrs.h
include/elf/tic6x.h
include/elf/tilegx.h
include/elf/tilepro.h
include/elf/v850.h
include/elf/vax.h
include/elf/vxworks.h
include/elf/x86-64.h
include/elf/xc16x.h
include/elf/xgate.h
include/elf/xstormy16.h
include/elf/xtensa.h
include/fibheap.h
include/filenames.h
include/floatformat.h
include/fnmatch.h
include/fopen-bin.h
include/fopen-same.h
include/fopen-vms.h
include/gdb/ChangeLog
include/gdb/callback.h
include/gdb/fileio.h
include/gdb/gdb-index.h
include/gdb/remote-sim.h
include/gdb/signals.def
include/gdb/signals.h
include/gdb/sim-arm.h
include/gdb/sim-bfin.h
include/gdb/sim-cr16.h
include/gdb/sim-d10v.h
include/gdb/sim-frv.h
include/gdb/sim-h8300.h
include/gdb/sim-lm32.h
include/gdb/sim-m32c.h
include/gdb/sim-ppc.h
include/gdb/sim-rl78.h
include/gdb/sim-rx.h
include/gdb/sim-sh.h
include/gdbm.h
include/getopt.h
include/hashtab.h
include/hp-symtab.h
include/ieee.h
include/leb128.h
include/libiberty.h
include/lto-symtab.h
include/mach-o/ChangeLog
include/mach-o/arm.h
include/mach-o/codesign.h
include/mach-o/external.h
include/mach-o/loader.h
include/mach-o/reloc.h
include/mach-o/x86-64.h
include/md5.h
include/nlm/ChangeLog
include/nlm/alpha-ext.h
include/nlm/common.h
include/nlm/external.h
include/nlm/i386-ext.h
include/nlm/internal.h
include/nlm/ppc-ext.h
include/nlm/sparc32-ext.h
include/oasys.h
include/objalloc.h
include/obstack.h
include/opcode/ChangeLog
include/opcode/ChangeLog-9103
include/opcode/aarch64.h
include/opcode/alpha.h
include/opcode/arc.h
include/opcode/arm.h
include/opcode/avr.h
include/opcode/bfin.h
include/opcode/cgen.h
include/opcode/convex.h
include/opcode/cr16.h
include/opcode/cris.h
include/opcode/crx.h
include/opcode/d10v.h
include/opcode/d30v.h
include/opcode/dlx.h
include/opcode/h8300.h
include/opcode/hppa.h
include/opcode/i370.h
include/opcode/i386.h
include/opcode/i860.h
include/opcode/i960.h
include/opcode/ia64.h
include/opcode/m68hc11.h
include/opcode/m68k.h
include/opcode/m88k.h
include/opcode/metag.h
include/opcode/mips.h
include/opcode/mmix.h
include/opcode/mn10200.h
include/opcode/mn10300.h
include/opcode/moxie.h
include/opcode/msp430-decode.h
include/opcode/msp430.h
include/opcode/nios2.h
include/opcode/np1.h
include/opcode/ns32k.h
include/opcode/or32.h
include/opcode/pdp11.h
include/opcode/pj.h
include/opcode/pn.h
include/opcode/ppc.h
include/opcode/pyr.h
include/opcode/rl78.h
include/opcode/rx.h
include/opcode/s390.h
include/opcode/score-datadep.h
include/opcode/score-inst.h
include/opcode/sparc.h
include/opcode/spu-insns.h
include/opcode/spu.h
include/opcode/tahoe.h
include/opcode/tic30.h
include/opcode/tic4x.h
include/opcode/tic54x.h
include/opcode/tic6x-control-registers.h
include/opcode/tic6x-insn-formats.h
include/opcode/tic6x-opcode-table.h
include/opcode/tic6x.h
include/opcode/tic80.h
include/opcode/tilegx.h
include/opcode/tilepro.h
include/opcode/v850.h
include/opcode/vax.h
include/opcode/xgate.h
include/os9k.h
include/partition.h
include/plugin-api.h
include/progress.h
include/safe-ctype.h
include/sha1.h
include/simple-object.h
include/som/ChangeLog
include/som/aout.h
include/som/clock.h
include/som/internal.h
include/som/lst.h
include/som/reloc.h
include/sort.h
include/splay-tree.h
include/symcat.h
include/timeval-utils.h
include/vms/ChangeLog
include/vms/dcx.h
include/vms/dmt.h
include/vms/dsc.h
include/vms/dst.h
include/vms/eeom.h
include/vms/egps.h
include/vms/egsd.h
include/vms/egst.h
include/vms/egsy.h
include/vms/eiaf.h
include/vms/eicp.h
include/vms/eidc.h
include/vms/eiha.h
include/vms/eihd.h
include/vms/eihi.h
include/vms/eihs.h
include/vms/eihvn.h
include/vms/eisd.h
include/vms/emh.h
include/vms/eobjrec.h
include/vms/esdf.h
include/vms/esdfm.h
include/vms/esdfv.h
include/vms/esgps.h
include/vms/esrf.h
include/vms/etir.h
include/vms/internal.h
include/vms/lbr.h
include/vms/prt.h
include/vms/shl.h
include/vtv-change-permission.h
include/xregex.h
include/xregex2.h
include/xtensa-config.h
include/xtensa-isa-internal.h
include/xtensa-isa.h
texinfo/texinfo.tex
Diffstat (limited to 'include/opcode/msp430.h')
-rw-r--r-- | include/opcode/msp430.h | 194 |
1 files changed, 0 insertions, 194 deletions
diff --git a/include/opcode/msp430.h b/include/opcode/msp430.h deleted file mode 100644 index caddc42db..000000000 --- a/include/opcode/msp430.h +++ /dev/null @@ -1,194 +0,0 @@ -/* Opcode table for the TI MSP430 microcontrollers - - Copyright 2002-2013 Free Software Foundation, Inc. - Contributed by Dmitry Diky <diwil@mail.ru> - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3, or (at your option) - any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, - MA 02110-1301, USA. */ - -#ifndef __MSP430_H_ -#define __MSP430_H_ - -struct msp430_operand_s -{ - int ol; /* Operand length words. */ - int am; /* Addr mode. */ - int reg; /* Register. */ - int mode; /* Pperand mode. */ -#define OP_REG 0 -#define OP_EXP 1 -#ifndef DASM_SECTION - expressionS exp; -#endif -}; - -#define BYTE_OPERATION (1 << 6) /* Byte operation flag for all instructions. */ - -struct msp430_opcode_s -{ - char *name; - int fmt; - int insn_opnumb; - int bin_opcode; - int bin_mask; -}; - -#define MSP_INSN(name, size, numb, bin, mask) { #name, size, numb, bin, mask } - -static struct msp430_opcode_s msp430_opcodes[] = -{ - MSP_INSN (and, 1, 2, 0xf000, 0xf000), - MSP_INSN (inv, 0, 1, 0xe330, 0xfff0), - MSP_INSN (xor, 1, 2, 0xe000, 0xf000), - MSP_INSN (setz, 0, 0, 0xd322, 0xffff), - MSP_INSN (setc, 0, 0, 0xd312, 0xffff), - MSP_INSN (eint, 0, 0, 0xd232, 0xffff), - MSP_INSN (setn, 0, 0, 0xd222, 0xffff), - MSP_INSN (bis, 1, 2, 0xd000, 0xf000), - MSP_INSN (clrz, 0, 0, 0xc322, 0xffff), - MSP_INSN (clrc, 0, 0, 0xc312, 0xffff), - MSP_INSN (dint, 0, 0, 0xc232, 0xffff), - MSP_INSN (clrn, 0, 0, 0xc222, 0xffff), - MSP_INSN (bic, 1, 2, 0xc000, 0xf000), - MSP_INSN (bit, 1, 2, 0xb000, 0xf000), - MSP_INSN (dadc, 0, 1, 0xa300, 0xff30), - MSP_INSN (dadd, 1, 2, 0xa000, 0xf000), - MSP_INSN (tst, 0, 1, 0x9300, 0xff30), - MSP_INSN (cmp, 1, 2, 0x9000, 0xf000), - MSP_INSN (decd, 0, 1, 0x8320, 0xff30), - MSP_INSN (dec, 0, 1, 0x8310, 0xff30), - MSP_INSN (sub, 1, 2, 0x8000, 0xf000), - MSP_INSN (sbc, 0, 1, 0x7300, 0xff30), - MSP_INSN (subc, 1, 2, 0x7000, 0xf000), - MSP_INSN (adc, 0, 1, 0x6300, 0xff30), - MSP_INSN (rlc, 0, 2, 0x6000, 0xf000), - MSP_INSN (addc, 1, 2, 0x6000, 0xf000), - MSP_INSN (incd, 0, 1, 0x5320, 0xff30), - MSP_INSN (inc, 0, 1, 0x5310, 0xff30), - MSP_INSN (rla, 0, 2, 0x5000, 0xf000), - MSP_INSN (add, 1, 2, 0x5000, 0xf000), - MSP_INSN (nop, 0, 0, 0x4303, 0xffff), - MSP_INSN (clr, 0, 1, 0x4300, 0xff30), - MSP_INSN (ret, 0, 0, 0x4130, 0xff30), - MSP_INSN (pop, 0, 1, 0x4130, 0xff30), - MSP_INSN (br, 0, 3, 0x4000, 0xf000), - MSP_INSN (mov, 1, 2, 0x4000, 0xf000), - MSP_INSN (jmp, 3, 1, 0x3c00, 0xfc00), - MSP_INSN (jl, 3, 1, 0x3800, 0xfc00), - MSP_INSN (jge, 3, 1, 0x3400, 0xfc00), - MSP_INSN (jn, 3, 1, 0x3000, 0xfc00), - MSP_INSN (jc, 3, 1, 0x2c00, 0xfc00), - MSP_INSN (jhs, 3, 1, 0x2c00, 0xfc00), - MSP_INSN (jnc, 3, 1, 0x2800, 0xfc00), - MSP_INSN (jlo, 3, 1, 0x2800, 0xfc00), - MSP_INSN (jz, 3, 1, 0x2400, 0xfc00), - MSP_INSN (jeq, 3, 1, 0x2400, 0xfc00), - MSP_INSN (jnz, 3, 1, 0x2000, 0xfc00), - MSP_INSN (jne, 3, 1, 0x2000, 0xfc00), - MSP_INSN (reti, 2, 0, 0x1300, 0xffc0), - MSP_INSN (call, 2, 1, 0x1280, 0xffc0), - MSP_INSN (push, 2, 1, 0x1200, 0xff80), - MSP_INSN (sxt, 2, 1, 0x1180, 0xffc0), - MSP_INSN (rra, 2, 1, 0x1100, 0xff80), - MSP_INSN (swpb, 2, 1, 0x1080, 0xffc0), - MSP_INSN (rrc, 2, 1, 0x1000, 0xff80), - /* Simple polymorphs. */ - MSP_INSN (beq, 4, 0, 0, 0xffff), - MSP_INSN (bne, 4, 1, 0, 0xffff), - MSP_INSN (blt, 4, 2, 0, 0xffff), - MSP_INSN (bltu, 4, 3, 0, 0xffff), - MSP_INSN (bge, 4, 4, 0, 0xffff), - MSP_INSN (bgeu, 4, 5, 0, 0xffff), - MSP_INSN (bltn, 4, 6, 0, 0xffff), - MSP_INSN (jump, 4, 7, 0, 0xffff), - /* Long polymorphs. */ - MSP_INSN (bgt, 5, 0, 0, 0xffff), - MSP_INSN (bgtu, 5, 1, 0, 0xffff), - MSP_INSN (bleu, 5, 2, 0, 0xffff), - MSP_INSN (ble, 5, 3, 0, 0xffff), - - /* MSP430X instructions - these ones use an extension word. - A negative format indicates an MSP430X instruction. */ - MSP_INSN (addcx, -2, 2, 0x6000, 0xf000), - MSP_INSN (addx, -2, 2, 0x5000, 0xf000), - MSP_INSN (andx, -2, 2, 0xf000, 0xf000), - MSP_INSN (bicx, -2, 2, 0xc000, 0xf000), - MSP_INSN (bisx, -2, 2, 0xd000, 0xf000), - MSP_INSN (bitx, -2, 2, 0xb000, 0xf000), - MSP_INSN (cmpx, -2, 2, 0x9000, 0xf000), - MSP_INSN (daddx, -2, 2, 0xa000, 0xf000), - MSP_INSN (movx, -2, 2, 0x4000, 0xf000), - MSP_INSN (subcx, -2, 2, 0x7000, 0xf000), - MSP_INSN (subx, -2, 2, 0x8000, 0xf000), - MSP_INSN (xorx, -2, 2, 0xe000, 0xf000), - - /* MSP430X Synthetic instructions. */ - MSP_INSN (adcx, -1, 1, 0x6300, 0xff30), - MSP_INSN (clra, -1, 1, 0x4300, 0xff30), - MSP_INSN (clrx, -1, 1, 0x4300, 0xff30), - MSP_INSN (dadcx, -1, 1, 0xa300, 0xff30), - MSP_INSN (decx, -1, 1, 0x8310, 0xff30), - MSP_INSN (decda, -1, 1, 0x8320, 0xff30), - MSP_INSN (decdx, -1, 1, 0x8320, 0xff30), - MSP_INSN (incx, -1, 1, 0x5310, 0xff30), - MSP_INSN (incda, -1, 1, 0x5320, 0xff30), - MSP_INSN (incdx, -1, 1, 0x5320, 0xff30), - MSP_INSN (invx, -1, 1, 0xe330, 0xfff0), - MSP_INSN (popx, -1, 1, 0x4130, 0xff30), - MSP_INSN (rlax, -1, 2, 0x5000, 0xf000), - MSP_INSN (rlcx, -1, 2, 0x6000, 0xf000), - MSP_INSN (sbcx, -1, 1, 0x7300, 0xff30), - MSP_INSN (tsta, -1, 1, 0x9300, 0xff30), - MSP_INSN (tstx, -1, 1, 0x9300, 0xff30), - - MSP_INSN (pushx, -3, 1, 0x1200, 0xff80), - MSP_INSN (rrax, -3, 1, 0x1100, 0xff80), - MSP_INSN (rrcx, -3, 1, 0x1000, 0xff80), - MSP_INSN (swpbx, -3, 1, 0x1080, 0xffc0), - MSP_INSN (sxtx, -3, 1, 0x1180, 0xffc0), - - /* MSP430X Address instructions - no extension word needed. - The insn_opnumb field is used to encode the nature of the - instruction for assembly and disassembly purposes. */ - MSP_INSN (calla, -1, 4, 0x1300, 0xff00), - - MSP_INSN (popm, -1, 5, 0x1600, 0xfe00), - MSP_INSN (pushm, -1, 5, 0x1400, 0xfe00), - - MSP_INSN (rrcm, -1, 6, 0x0040, 0xf3e0), - MSP_INSN (rram, -1, 6, 0x0140, 0xf3e0), - MSP_INSN (rlam, -1, 6, 0x0240, 0xf3e0), - MSP_INSN (rrum, -1, 6, 0x0340, 0xf3e0), - - MSP_INSN (rrux, -1, 7, 0x0340, 0xffe0), /* Synthesized in terms of RRUM. */ - - MSP_INSN (adda, -1, 8, 0x00a0, 0xf0b0), - MSP_INSN (cmpa, -1, 8, 0x0090, 0xf0b0), - MSP_INSN (suba, -1, 8, 0x00b0, 0xf0b0), - - MSP_INSN (reta, -1, 9, 0x0110, 0xffff), - MSP_INSN (bra, -1, 9, 0x0000, 0xf0cf), - MSP_INSN (mova, -1, 9, 0x0000, 0xf080), - MSP_INSN (mova, -1, 9, 0x0080, 0xf0b0), - MSP_INSN (mova, -1, 9, 0x00c0, 0xf0f0), - - /* Pseudo instruction to set the repeat field in the extension word. */ - MSP_INSN (rpt, -1, 10, 0x0000, 0x0000), - - /* End of instruction set. */ - { NULL, 0, 0, 0, 0 } -}; - -#endif |