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author | Nick Clifton <nickc@redhat.com> | 2010-11-23 17:04:11 +0000 |
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committer | Nick Clifton <nickc@redhat.com> | 2010-11-23 17:04:11 +0000 |
commit | 32ab31795a37956f9a024b6f0d142e999c827151 (patch) | |
tree | 519aeff05adbfed1da4f2f27fbd6926c802d0c8e | |
parent | 943c59e3e85d52d7924a91e112a518af4647d311 (diff) | |
download | cygnal-32ab31795a37956f9a024b6f0d142e999c827151.tar.gz cygnal-32ab31795a37956f9a024b6f0d142e999c827151.tar.bz2 cygnal-32ab31795a37956f9a024b6f0d142e999c827151.zip |
* mips.h (INSN_CHIP_MASK): Update according to INSN_LOONGSON_3A.
(INSN_LOONGSON_3A): Clear bit 31.
* elfxx-mips.c (mips_set_isa_flags): Move bfd_mach_loongson_3a
after bfd_mach_mips_sb1.
* config/tc-mips.c (mips_cpu_info_table): Move loongson3a after sb1.
-rw-r--r-- | include/opcode/ChangeLog | 5 | ||||
-rw-r--r-- | include/opcode/mips.h | 4 |
2 files changed, 7 insertions, 2 deletions
diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog index 197220d09..8ea9b98b9 100644 --- a/include/opcode/ChangeLog +++ b/include/opcode/ChangeLog @@ -1,3 +1,8 @@ +2010-11-23 Maciej W. Rozycki <macro@linux-mips.org> + + * mips.h (INSN_CHIP_MASK): Update according to INSN_LOONGSON_3A. + (INSN_LOONGSON_3A): Clear bit 31. + 2010-11-15 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> PR gas/12198 diff --git a/include/opcode/mips.h b/include/opcode/mips.h index 8817ce302..af9ad2154 100644 --- a/include/opcode/mips.h +++ b/include/opcode/mips.h @@ -544,7 +544,7 @@ static const unsigned int mips_isa_table[] = { 0x0001, 0x0003, 0x0607, 0x1e0f, 0x3e1f, 0x0a23, 0x3e63, 0x3ebf, 0x3fff }; /* Masks used for Chip specific instructions. */ -#define INSN_CHIP_MASK 0xc3ff0820 +#define INSN_CHIP_MASK 0xc3ff0c20 /* Cavium Networks Octeon instructions. */ #define INSN_OCTEON 0x00000800 @@ -593,7 +593,7 @@ static const unsigned int mips_isa_table[] = /* ST Microelectronics Loongson 2E. */ #define INSN_LOONGSON_2E 0x40000000 /* ST Microelectronics Loongson 2F. */ -#define INSN_LOONGSON_2F 0x80000000 +#define INSN_LOONGSON_3A 0x00000400 /* Loongson 3A. */ #define INSN_LOONGSON_3A 0x80000400 /* RMI Xlr instruction */ |