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| author | Brian Inglis <Brian.Inglis@SystematicSW.ab.ca> | 2020-12-17 00:11:28 -0700 |
|---|---|---|
| committer | Corinna Vinschen <corinna@vinschen.de> | 2020-12-17 16:03:50 +0100 |
| commit | 1dd3f69db55056da2cac64edd227d52f9542483a (patch) | |
| tree | 4b7cd060704a6cd1ff678db3e8fdfc81732e3f1a | |
| parent | 865cd30dcc2f00c81c8b3624a9f3464138cd24a5 (diff) | |
| download | cygnal-1dd3f69db55056da2cac64edd227d52f9542483a.tar.gz cygnal-1dd3f69db55056da2cac64edd227d52f9542483a.tar.bz2 cygnal-1dd3f69db55056da2cac64edd227d52f9542483a.zip | |
fhandler_proc.cc(format_proc_cpuinfo): report Intel SGX bits
Update to Linux next 5.10 cpuinfo flags for Intel SDM 36.7.1 Software
Guard Extensions, and 38.1.4 SGX Launch Control Configuration.
Launch control restricts what software can run with enclave protections,
which helps protect the system from bad enclaves.
| -rw-r--r-- | winsup/cygwin/fhandler_proc.cc | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/winsup/cygwin/fhandler_proc.cc b/winsup/cygwin/fhandler_proc.cc index 13397150f..8e23c0609 100644 --- a/winsup/cygwin/fhandler_proc.cc +++ b/winsup/cygwin/fhandler_proc.cc @@ -1414,6 +1414,7 @@ format_proc_cpuinfo (void *, char *&destbuf) ftcprint (features1, 0, "fsgsbase"); /* rd/wr fs/gs base */ ftcprint (features1, 1, "tsc_adjust"); /* TSC adjustment MSR 0x3B */ + ftcprint (features1, 2, "sgx"); /* software guard extensions */ ftcprint (features1, 3, "bmi1"); /* bit manip ext group 1 */ ftcprint (features1, 4, "hle"); /* hardware lock elision */ ftcprint (features1, 5, "avx2"); /* AVX ext instructions */ @@ -1564,6 +1565,7 @@ format_proc_cpuinfo (void *, char *&destbuf) ftcprint (features1, 27, "movdiri"); /* movdiri instr */ ftcprint (features1, 28, "movdir64b"); /* movdir64b instr */ ftcprint (features1, 29, "enqcmd"); /* enqcmd/s instructions*/ + ftcprint (features1, 30, "sgx_lc"); /* sgx launch control */ } /* AMD MCA cpuid 0x80000007 ebx */ |