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| author | Joseph Myers <joseph@codesourcery.com> | 2006-09-19 18:45:45 +0000 |
|---|---|---|
| committer | Joseph Myers <joseph@codesourcery.com> | 2006-09-19 18:45:45 +0000 |
| commit | 9fbad39d7751d4ff54139f1c930567569d489b4e (patch) | |
| tree | bd530deb63124b8f1a8e47da718ee3a7b6f7e329 | |
| parent | a8531fc809bec4ae355ec2503c128e41770f9573 (diff) | |
| download | cygnal-9fbad39d7751d4ff54139f1c930567569d489b4e.tar.gz cygnal-9fbad39d7751d4ff54139f1c930567569d489b4e.tar.bz2 cygnal-9fbad39d7751d4ff54139f1c930567569d489b4e.zip | |
2006-09-19 Mark Shinwell <shinwell@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
Ian Lance Taylor <ian@wasabisystems.com>
Ben Elliston <bje@wasabisystems.com>
bfd/
* archures.c: Add definition for bfd_mach_arm_iWMMXt2.
* cpu-arm.c (processors): Add bfd_mach_arm_iWMMXt2.
(arch_info_struct, bfd_arm_update_notes): Likewise.
(architectures): Likewise.
(bfd_arm_merge_machines): Check for iWMMXt2.
* bfd-in2.h: Rebuild.
gas/
* config/tc-arm.c (enum operand_parse_code): New code OP_RIWR_I32z.
(parse_operands): Handle OP_RIWR_I32z.
(do_iwmmxt_wmerge): New function.
(do_iwmmxt_wldstd): Handle iwmmxt2 case where second operand is
a register.
(do_iwmmxt_wrwrwr_or_imm5): New function.
(insns): Mark instructions as RIWR_I32z as appropriate.
Also add torvsc<b,h,w>, wabs<b,h,w>, wabsdiff<b,h,w>,
waddbhus<l,m>, waddhc, waddwc, waddsubhx, wavg4{r}, wmaddu{x,n},
wmadds{x,n}, wmerge, wmiaxy{n}, wmiawxy{n}, wmul<sm,um>{r},
wmulw<um,sm,l>{r}, wqmiaxy{n}, wqmulm{r}, wqmulwm{r}, wsubaddhx.
(md_begin): Handle IWMMXT2.
(arm_cpus): Add iwmmxt2.
(arm_extensions): Likewise.
(arm_archs): Likewise.
gas/testsuite/
* gas/arm/iwmmxt2.s: New file.
* gas/arm/iwmmxt2.d: New file.
opcodes/
* arm-dis.c (coprocessor_opcodes): The X-qualifier to WMADD may
only be used with the default multiply-add operation, so if N is
set, don't bother printing X. Add new iwmmxt instructions.
(IWMMXT_INSN_COUNT): Update.
(iwmmxt_wwssnames): Qualify "wwss" names at index 2, 6, 10 and 14
with a 'c' suffix.
(print_insn_coprocessor): Check for iWMMXt2. Handle format
specifiers 'r', 'i'.
| -rw-r--r-- | ChangeLog.csl | 44 | ||||
| -rw-r--r-- | include/opcode/arm.h | 3 |
2 files changed, 47 insertions, 0 deletions
diff --git a/ChangeLog.csl b/ChangeLog.csl index c89d2fddd..cf7b0ba8d 100644 --- a/ChangeLog.csl +++ b/ChangeLog.csl @@ -1,3 +1,47 @@ +2006-09-19 Mark Shinwell <shinwell@codesourcery.com> + Joseph Myers <joseph@codesourcery.com> + Ian Lance Taylor <ian@wasabisystems.com> + Ben Elliston <bje@wasabisystems.com> + + bfd/ + * archures.c: Add definition for bfd_mach_arm_iWMMXt2. + * cpu-arm.c (processors): Add bfd_mach_arm_iWMMXt2. + (arch_info_struct, bfd_arm_update_notes): Likewise. + (architectures): Likewise. + (bfd_arm_merge_machines): Check for iWMMXt2. + * bfd-in2.h: Rebuild. + + gas/ + * config/tc-arm.c (enum operand_parse_code): New code OP_RIWR_I32z. + (parse_operands): Handle OP_RIWR_I32z. + (do_iwmmxt_wmerge): New function. + (do_iwmmxt_wldstd): Handle iwmmxt2 case where second operand is + a register. + (do_iwmmxt_wrwrwr_or_imm5): New function. + (insns): Mark instructions as RIWR_I32z as appropriate. + Also add torvsc<b,h,w>, wabs<b,h,w>, wabsdiff<b,h,w>, + waddbhus<l,m>, waddhc, waddwc, waddsubhx, wavg4{r}, wmaddu{x,n}, + wmadds{x,n}, wmerge, wmiaxy{n}, wmiawxy{n}, wmul<sm,um>{r}, + wmulw<um,sm,l>{r}, wqmiaxy{n}, wqmulm{r}, wqmulwm{r}, wsubaddhx. + (md_begin): Handle IWMMXT2. + (arm_cpus): Add iwmmxt2. + (arm_extensions): Likewise. + (arm_archs): Likewise. + + gas/testsuite/ + * gas/arm/iwmmxt2.s: New file. + * gas/arm/iwmmxt2.d: New file. + + opcodes/ + * arm-dis.c (coprocessor_opcodes): The X-qualifier to WMADD may + only be used with the default multiply-add operation, so if N is + set, don't bother printing X. Add new iwmmxt instructions. + (IWMMXT_INSN_COUNT): Update. + (iwmmxt_wwssnames): Qualify "wwss" names at index 2, 6, 10 and 14 + with a 'c' suffix. + (print_insn_coprocessor): Check for iWMMXt2. Handle format + specifiers 'r', 'i'. + 2006-09-18 Paul Brook <paul@codesourcery.com> gas/ diff --git a/include/opcode/arm.h b/include/opcode/arm.h index f142fca9a..24a89cfcb 100644 --- a/include/opcode/arm.h +++ b/include/opcode/arm.h @@ -49,6 +49,7 @@ #define ARM_CEXT_XSCALE 0x00000001 /* Allow MIA etc. */ #define ARM_CEXT_MAVERICK 0x00000002 /* Use Cirrus/DSP coprocessor. */ #define ARM_CEXT_IWMMXT 0x00000004 /* Intel Wireless MMX technology coprocessor. */ +#define ARM_CEXT_IWMMXT2 0x00000008 /* Intel Wireless MMX technology coprocessor version 2. */ #define FPU_ENDIAN_PURE 0x80000000 /* Pure-endian doubles. */ #define FPU_ENDIAN_BIG 0 /* Double words-big-endian. */ @@ -103,6 +104,8 @@ #define ARM_ARCH_XSCALE ARM_FEATURE (ARM_AEXT_V5TE, ARM_CEXT_XSCALE) #define ARM_ARCH_IWMMXT \ ARM_FEATURE (ARM_AEXT_V5TE, ARM_CEXT_XSCALE | ARM_CEXT_IWMMXT) +#define ARM_ARCH_IWMMXT2 \ + ARM_FEATURE (ARM_AEXT_V5TE, ARM_CEXT_XSCALE | ARM_CEXT_IWMMXT | ARM_CEXT_IWMMXT2) #define FPU_VFP_V1xD (FPU_VFP_EXT_V1xD | FPU_ENDIAN_PURE) #define FPU_VFP_V1 (FPU_VFP_V1xD | FPU_VFP_EXT_V1) |