From 010b654fac6c49ac2c734ee4151c641fbe49b403 Mon Sep 17 00:00:00 2001 From: cvs2svn <> Date: Wed, 2 Apr 2003 16:55:27 +0000 Subject: This commit was manufactured by cvs2svn to create branch 'cagney_frameaddr-20030403-branch'. Sprout from cagney_framebase-20030326-branch 2003-03-25 20:56:02 UTC cvs2svn 'This commit was manufactured by cvs2svn to create branch' Cherrypick from master 2003-04-02 16:55:26 UTC Bob Wilson ' * xtensa-config.h: Remove comment indicating that this is a': include/ChangeLog include/dis-asm.h include/elf/ChangeLog include/elf/arm.h include/elf/common.h include/elf/xtensa.h include/gdb/ChangeLog include/gdb/sim-arm.h include/xtensa-config.h include/xtensa-isa-internal.h include/xtensa-isa.h --- include/ChangeLog | 12 +++ include/dis-asm.h | 1 + include/elf/ChangeLog | 9 ++ include/elf/arm.h | 2 +- include/elf/common.h | 4 + include/elf/xtensa.h | 87 ++++++++++++++++ include/gdb/ChangeLog | 4 + include/gdb/sim-arm.h | 34 ++++++- include/xtensa-config.h | 64 ++++++++++++ include/xtensa-isa-internal.h | 114 +++++++++++++++++++++ include/xtensa-isa.h | 230 ++++++++++++++++++++++++++++++++++++++++++ 11 files changed, 559 insertions(+), 2 deletions(-) create mode 100644 include/elf/xtensa.h create mode 100644 include/xtensa-config.h create mode 100644 include/xtensa-isa-internal.h create mode 100644 include/xtensa-isa.h diff --git a/include/ChangeLog b/include/ChangeLog index 0e558d3c1..9c16fddad 100644 --- a/include/ChangeLog +++ b/include/ChangeLog @@ -1,3 +1,15 @@ +2003-04-02 Bob Wilson + + * xtensa-config.h: Remove comment indicating that this is a + generated file. + +2003-04-01 Bob Wilson + + * dis-asm.h (print_insn_xtensa): Declare. + * xtensa-config.h: New file. + * xtensa-isa-internal.h: Likewise. + * xtensa-isa.h: Likewise. + 2003-03-17 Kaveh R. Ghazi * ansidecl.h (ATTRIBUTE_NONNULL, ATTRIBUTE_NULL_PRINTF, diff --git a/include/dis-asm.h b/include/dis-asm.h index 5e6bdc3ad..392cbf9b4 100644 --- a/include/dis-asm.h +++ b/include/dis-asm.h @@ -237,6 +237,7 @@ extern int print_insn_v850 PARAMS ((bfd_vma, disassemble_info*)); extern int print_insn_vax PARAMS ((bfd_vma, disassemble_info*)); extern int print_insn_w65 PARAMS ((bfd_vma, disassemble_info*)); extern int print_insn_xstormy16 PARAMS ((bfd_vma, disassemble_info*)); +extern int print_insn_xtensa PARAMS ((bfd_vma, disassemble_info*)); extern int print_insn_sh64 PARAMS ((bfd_vma, disassemble_info *)); extern int print_insn_sh64x_media PARAMS ((bfd_vma, disassemble_info *)); extern int print_insn_frv PARAMS ((bfd_vma, disassemble_info *)); diff --git a/include/elf/ChangeLog b/include/elf/ChangeLog index 5411f7691..9d5ea67c1 100644 --- a/include/elf/ChangeLog +++ b/include/elf/ChangeLog @@ -1,3 +1,12 @@ +2003-04-01 Bob Wilson + + * elf/common.h (EM_XTENSA_OLD): Define. + * elf/xtensa.h: New file. + +2003-04-01 Nick Clifton + + * arm.h (ARM_NOTE_SECTION): Include .gnu in the string. + 2003-03-25 Stan Cox Nick Clifton diff --git a/include/elf/arm.h b/include/elf/arm.h index 3b3f8d0e2..181a9f0c5 100644 --- a/include/elf/arm.h +++ b/include/elf/arm.h @@ -141,6 +141,6 @@ START_RELOC_NUMBERS (elf_arm_reloc_type) END_RELOC_NUMBERS (R_ARM_max) /* The name of the note section used to identify arm variants. */ -#define ARM_NOTE_SECTION ".note.arm.ident" +#define ARM_NOTE_SECTION ".note.gnu.arm.ident" #endif /* _ELF_ARM_H */ diff --git a/include/elf/common.h b/include/elf/common.h index 2315fa8d7..a515817a5 100644 --- a/include/elf/common.h +++ b/include/elf/common.h @@ -261,6 +261,10 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ /* Vitesse IQ2000. */ #define EM_IQ2000 0xFEBA + +/* Old, unofficial value for Xtensa. */ +#define EM_XTENSA_OLD 0xabc7 + /* See the above comment before you add a new EM_* value here. */ /* Values for e_version. */ diff --git a/include/elf/xtensa.h b/include/elf/xtensa.h new file mode 100644 index 000000000..394ee4138 --- /dev/null +++ b/include/elf/xtensa.h @@ -0,0 +1,87 @@ +/* Xtensa ELF support for BFD. + Copyright 2003 Free Software Foundation, Inc. + Contributed by Bob Wilson (bwilson@tensilica.com) at Tensilica. + + This file is part of BFD, the Binary File Descriptor library. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + +/* This file holds definitions specific to the Xtensa ELF ABI. */ + +#ifndef _ELF_XTENSA_H +#define _ELF_XTENSA_H + +#include "elf/reloc-macros.h" + +/* Relocations. */ +START_RELOC_NUMBERS (elf_xtensa_reloc_type) + RELOC_NUMBER (R_XTENSA_NONE, 0) + RELOC_NUMBER (R_XTENSA_32, 1) + RELOC_NUMBER (R_XTENSA_RTLD, 2) + RELOC_NUMBER (R_XTENSA_GLOB_DAT, 3) + RELOC_NUMBER (R_XTENSA_JMP_SLOT, 4) + RELOC_NUMBER (R_XTENSA_RELATIVE, 5) + RELOC_NUMBER (R_XTENSA_PLT, 6) + RELOC_NUMBER (R_XTENSA_OP0, 8) + RELOC_NUMBER (R_XTENSA_OP1, 9) + RELOC_NUMBER (R_XTENSA_OP2, 10) + RELOC_NUMBER (R_XTENSA_ASM_EXPAND, 11) + RELOC_NUMBER (R_XTENSA_ASM_SIMPLIFY, 12) + RELOC_NUMBER (R_XTENSA_GNU_VTINHERIT, 15) + RELOC_NUMBER (R_XTENSA_GNU_VTENTRY, 16) +END_RELOC_NUMBERS (R_XTENSA_max) + +/* Processor-specific flags for the ELF header e_flags field. */ + +/* Four-bit Xtensa machine type field. */ +#define EF_XTENSA_MACH 0x0000000f + +/* Various CPU types. */ +#define E_XTENSA_MACH 0x00000000 + +/* Leave bits 0xf0 alone in case we ever have more than 16 cpu types. + Highly unlikely, but what the heck. */ + +#define EF_XTENSA_XT_INSN 0x00000100 +#define EF_XTENSA_XT_LIT 0x00000200 + + +/* Processor-specific dynamic array tags. */ + +/* Offset of the table that records the GOT location(s). */ +#define DT_XTENSA_GOT_LOC_OFF 0x70000000 + +/* Number of entries in the GOT location table. */ +#define DT_XTENSA_GOT_LOC_SZ 0x70000001 + + +/* Definitions for instruction and literal property tables. The + instruction tables for ".gnu.linkonce.t.*" sections are placed in + the following sections: + + instruction tables: .gnu.linkonce.x.* + literal tables: .gnu.linkonce.p.* +*/ + +#define XTENSA_INSN_SEC_NAME ".xt.insn" +#define XTENSA_LIT_SEC_NAME ".xt.lit" + +typedef struct property_table_entry_t +{ + bfd_vma address; + bfd_vma size; +} property_table_entry; + +#endif /* _ELF_XTENSA_H */ diff --git a/include/gdb/ChangeLog b/include/gdb/ChangeLog index 97c2f443c..9a216a0f3 100644 --- a/include/gdb/ChangeLog +++ b/include/gdb/ChangeLog @@ -1,3 +1,7 @@ +2003-03-27 Nick Clifton + + * sim-arm.h (sim_arm_regs): Add iWMMXt registers. + 2003-03-20 Nick Clifton * sim-arm.h (sim_arm_regs): Add Maverick co-processor diff --git a/include/gdb/sim-arm.h b/include/gdb/sim-arm.h index fae11f0b1..5598f73fa 100644 --- a/include/gdb/sim-arm.h +++ b/include/gdb/sim-arm.h @@ -72,7 +72,39 @@ enum sim_arm_regs SIM_ARM_MAVERIC_COP0R13_REGNUM, SIM_ARM_MAVERIC_COP0R14_REGNUM, SIM_ARM_MAVERIC_COP0R15_REGNUM, - SIM_ARM_MAVERIC_DSPSC_REGNUM + SIM_ARM_MAVERIC_DSPSC_REGNUM, + SIM_ARM_IWMMXT_COP0R0_REGNUM, + SIM_ARM_IWMMXT_COP0R1_REGNUM, + SIM_ARM_IWMMXT_COP0R2_REGNUM, + SIM_ARM_IWMMXT_COP0R3_REGNUM, + SIM_ARM_IWMMXT_COP0R4_REGNUM, + SIM_ARM_IWMMXT_COP0R5_REGNUM, + SIM_ARM_IWMMXT_COP0R6_REGNUM, + SIM_ARM_IWMMXT_COP0R7_REGNUM, + SIM_ARM_IWMMXT_COP0R8_REGNUM, + SIM_ARM_IWMMXT_COP0R9_REGNUM, + SIM_ARM_IWMMXT_COP0R10_REGNUM, + SIM_ARM_IWMMXT_COP0R11_REGNUM, + SIM_ARM_IWMMXT_COP0R12_REGNUM, + SIM_ARM_IWMMXT_COP0R13_REGNUM, + SIM_ARM_IWMMXT_COP0R14_REGNUM, + SIM_ARM_IWMMXT_COP0R15_REGNUM, + SIM_ARM_IWMMXT_COP1R0_REGNUM, + SIM_ARM_IWMMXT_COP1R1_REGNUM, + SIM_ARM_IWMMXT_COP1R2_REGNUM, + SIM_ARM_IWMMXT_COP1R3_REGNUM, + SIM_ARM_IWMMXT_COP1R4_REGNUM, + SIM_ARM_IWMMXT_COP1R5_REGNUM, + SIM_ARM_IWMMXT_COP1R6_REGNUM, + SIM_ARM_IWMMXT_COP1R7_REGNUM, + SIM_ARM_IWMMXT_COP1R8_REGNUM, + SIM_ARM_IWMMXT_COP1R9_REGNUM, + SIM_ARM_IWMMXT_COP1R10_REGNUM, + SIM_ARM_IWMMXT_COP1R11_REGNUM, + SIM_ARM_IWMMXT_COP1R12_REGNUM, + SIM_ARM_IWMMXT_COP1R13_REGNUM, + SIM_ARM_IWMMXT_COP1R14_REGNUM, + SIM_ARM_IWMMXT_COP1R15_REGNUM }; #ifdef __cplusplus diff --git a/include/xtensa-config.h b/include/xtensa-config.h new file mode 100644 index 000000000..b47cbd754 --- /dev/null +++ b/include/xtensa-config.h @@ -0,0 +1,64 @@ +/* Xtensa configuration settings. + Copyright (C) 2003 Free Software Foundation, Inc. + Contributed by Bob Wilson (bwilson@tensilica.com) at Tensilica. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2, or (at your option) + any later version. + + This program is distributed in the hope that it will be useful, but + WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + +#ifndef XTENSA_CONFIG_H +#define XTENSA_CONFIG_H + +/* The macros defined here match those with the same names in the Xtensa + compile-time HAL (Hardware Abstraction Layer). Please refer to the + Xtensa System Software Reference Manual for documentation of these + macros. */ + +#define XCHAL_HAVE_BE 1 +#define XCHAL_HAVE_DENSITY 1 +#define XCHAL_HAVE_MAC16 0 +#define XCHAL_HAVE_MUL16 0 +#define XCHAL_HAVE_MUL32 0 +#define XCHAL_HAVE_DIV32 0 +#define XCHAL_HAVE_NSA 1 +#define XCHAL_HAVE_MINMAX 0 +#define XCHAL_HAVE_SEXT 0 +#define XCHAL_HAVE_LOOPS 1 +#define XCHAL_HAVE_BOOLEANS 0 +#define XCHAL_HAVE_FP 0 +#define XCHAL_HAVE_FP_DIV 0 +#define XCHAL_HAVE_FP_RECIP 0 +#define XCHAL_HAVE_FP_SQRT 0 +#define XCHAL_HAVE_FP_RSQRT 0 +#define XCHAL_HAVE_WINDOWED 1 + +#define XCHAL_ICACHE_SIZE 8192 +#define XCHAL_DCACHE_SIZE 8192 +#define XCHAL_ICACHE_LINESIZE 16 +#define XCHAL_DCACHE_LINESIZE 16 +#define XCHAL_ICACHE_LINEWIDTH 4 +#define XCHAL_DCACHE_LINEWIDTH 4 +#define XCHAL_DCACHE_IS_WRITEBACK 0 + +#define XCHAL_HAVE_MMU 1 +#define XCHAL_MMU_MIN_PTE_PAGE_SIZE 12 + +#define XCHAL_HAVE_DEBUG 1 +#define XCHAL_NUM_IBREAK 2 +#define XCHAL_NUM_DBREAK 2 +#define XCHAL_DEBUGLEVEL 4 + +#define XCHAL_EXTRA_SA_SIZE 0 +#define XCHAL_EXTRA_SA_ALIGN 1 + +#endif /* !XTENSA_CONFIG_H */ diff --git a/include/xtensa-isa-internal.h b/include/xtensa-isa-internal.h new file mode 100644 index 000000000..d2244c510 --- /dev/null +++ b/include/xtensa-isa-internal.h @@ -0,0 +1,114 @@ +/* Internal definitions for configurable Xtensa ISA support. + Copyright 2003 Free Software Foundation, Inc. + + This file is part of BFD, the Binary File Descriptor library. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + +/* Use the statically-linked version for the GNU tools. */ +#define STATIC_LIBISA 1 + +#define ISA_INTERFACE_VERSION 3 + +struct config_struct +{ + char *param_name; + char *param_value; +}; + +/* Encode/decode function types for immediate operands. */ +typedef uint32 (*xtensa_immed_decode_fn) (uint32); +typedef xtensa_encode_result (*xtensa_immed_encode_fn) (uint32 *); + +/* Field accessor function types. */ +typedef uint32 (*xtensa_get_field_fn) (const xtensa_insnbuf); +typedef void (*xtensa_set_field_fn) (xtensa_insnbuf, uint32); + +/* PC-relative relocation function types. */ +typedef uint32 (*xtensa_do_reloc_fn) (uint32, uint32); +typedef uint32 (*xtensa_undo_reloc_fn) (uint32, uint32); + +/* Instruction decode function type. */ +typedef int (*xtensa_insn_decode_fn) (const xtensa_insnbuf); + +/* Instruction encoding template function type (each of these functions + returns a constant template; they exist only to make it easier for the + TIE compiler to generate endian-independent DLLs). */ +typedef xtensa_insnbuf (*xtensa_encoding_template_fn) (void); + + +typedef struct xtensa_operand_internal_struct +{ + char *operand_kind; /* e.g., "a", "f", "i", "l".... */ + char inout; /* '<', '>', or '='. */ + char isPCRelative; /* Is this a PC-relative offset? */ + xtensa_get_field_fn get_field; /* Get encoded value of the field. */ + xtensa_set_field_fn set_field; /* Set field with an encoded value. */ + xtensa_immed_encode_fn encode; /* Encode the operand value. */ + xtensa_immed_decode_fn decode; /* Decode the value from the field. */ + xtensa_do_reloc_fn do_reloc; /* Perform a PC-relative relocation. */ + xtensa_undo_reloc_fn undo_reloc; /* Undo a PC-relative relocation. */ +} xtensa_operand_internal; + + +typedef struct xtensa_iclass_internal_struct +{ + int num_operands; /* Size of "operands" array. */ + xtensa_operand_internal **operands; /* Array of operand structures. */ +} xtensa_iclass_internal; + + +typedef struct xtensa_opcode_internal_struct +{ + const char *name; /* Opcode mnemonic. */ + int length; /* Length in bytes of the insn. */ + xtensa_encoding_template_fn template; /* Fn returning encoding template. */ + xtensa_iclass_internal *iclass; /* Iclass for this opcode. */ +} xtensa_opcode_internal; + + +typedef struct opname_lookup_entry_struct +{ + const char *key; /* Opcode mnemonic. */ + xtensa_opcode opcode; /* Internal opcode number. */ +} opname_lookup_entry; + + +typedef struct xtensa_isa_internal_struct +{ + int is_big_endian; /* Endianness. */ + int insn_size; /* Maximum length in bytes. */ + int insnbuf_size; /* Number of insnbuf_words. */ + int num_opcodes; /* Total number for all modules. */ + xtensa_opcode_internal **opcode_table;/* Indexed by internal opcode #. */ + int num_modules; /* Number of modules (DLLs) loaded. */ + int *module_opcode_base; /* Starting opcode # for each module. */ + xtensa_insn_decode_fn *module_decode_fn; /* Decode fn for each module. */ + opname_lookup_entry *opname_lookup_table; /* Lookup table for each module. */ + struct config_struct *config; /* Table of configuration parameters. */ + int has_density; /* Is density option available? */ +} xtensa_isa_internal; + + +typedef struct xtensa_isa_module_struct +{ + const int (*get_num_opcodes_fn) (void); + xtensa_opcode_internal **(*get_opcodes_fn) (void); + int (*decode_insn_fn) (const xtensa_insnbuf); + struct config_struct *(*get_config_table_fn) (void); +} xtensa_isa_module; + +extern xtensa_isa_module xtensa_isa_modules[]; + diff --git a/include/xtensa-isa.h b/include/xtensa-isa.h new file mode 100644 index 000000000..54f750c9a --- /dev/null +++ b/include/xtensa-isa.h @@ -0,0 +1,230 @@ +/* Interface definition for configurable Xtensa ISA support. + Copyright 2003 Free Software Foundation, Inc. + + This file is part of BFD, the Binary File Descriptor library. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + +#ifndef XTENSA_LIBISA_H +#define XTENSA_LIBISA_H + +/* Use the statically-linked version for the GNU tools. */ +#define STATIC_LIBISA 1 + +#ifdef __cplusplus +extern "C" { +#endif + +#ifndef uint32 +#define uint32 unsigned int +#endif + +/* This file defines the interface to the Xtensa ISA library. This library + contains most of the ISA-specific information for a particular Xtensa + processor. For example, the set of valid instructions, their opcode + encodings and operand fields are all included here. To support Xtensa's + configurability and user-defined instruction extensions (i.e., TIE), the + library is initialized by loading one or more dynamic libraries; only a + small set of interface code is present in the statically-linked portion + of the library. + + This interface basically defines four abstract data types. + + . an instruction buffer - for holding the raw instruction bits + . ISA info - information about the ISA as a whole + . opcode info - information about individual instructions + . operand info - information about specific instruction operands + + It would be nice to implement these as classes in C++, but the library is + implemented in C to match the expectations of the GNU tools. + Instead, the interface defines a set of functions to access each data + type. With the exception of the instruction buffer, the internal + representations of the data structures are hidden. All accesses must be + made through the functions defined here. */ + +typedef void* xtensa_isa; +typedef void* xtensa_operand; + + +/* Opcodes are represented here using sequential integers beginning with 0. + The specific value used for a particular opcode is only fixed for a + particular instantiation of an xtensa_isa structure, so these values + should only be used internally. */ +typedef int xtensa_opcode; + +/* Define a unique value for undefined opcodes ("static const int" doesn't + seem to work for this because EGCS 1.0.3 on i686-Linux without -O won't + allow it to be used as an initializer). */ +#define XTENSA_UNDEFINED -1 + + +typedef int libisa_module_specifier; + +extern xtensa_isa xtensa_isa_init (void); + + +/* Instruction buffers. */ + +typedef uint32 xtensa_insnbuf_word; +typedef xtensa_insnbuf_word *xtensa_insnbuf; + +/* Get the size in words of the xtensa_insnbuf array. */ +extern int xtensa_insnbuf_size (xtensa_isa); + +/* Allocate (with malloc) an xtensa_insnbuf of the right size. */ +extern xtensa_insnbuf xtensa_insnbuf_alloc (xtensa_isa); + +/* Release (with free) an xtensa_insnbuf of the right size. */ +extern void xtensa_insnbuf_free (xtensa_insnbuf); + +/* Inward and outward conversion from memory images (byte streams) to our + internal instruction representation. */ +extern void xtensa_insnbuf_to_chars (xtensa_isa, const xtensa_insnbuf, + char *); + +extern void xtensa_insnbuf_from_chars (xtensa_isa, xtensa_insnbuf, + const char *); + + +/* ISA information. */ + +/* Load the ISA information from a shared library. If successful, this returns + a value which identifies the ISA for use in subsequent calls to the ISA + library; otherwise, it returns NULL. Multiple ISAs can be loaded to support + heterogeneous multiprocessor systems. */ +extern xtensa_isa xtensa_load_isa (libisa_module_specifier); + +/* Extend an existing set of ISA information by loading an additional shared + library of ISA information. This is primarily intended for loading TIE + extensions. If successful, the return value is non-zero. */ +extern int xtensa_extend_isa (xtensa_isa, libisa_module_specifier); + +/* The default ISA. This variable is set automatically to the ISA most + recently loaded and is provided as a convenience. An exception is the GNU + opcodes library, where there is a fixed interface that does not allow + passing the ISA as a parameter and the ISA must be taken from this global + variable. (Note: Since this variable is just a convenience, it is not + exported when libisa is built as a DLL, due to the hassle of dealing with + declspecs.) */ +extern xtensa_isa xtensa_default_isa; + + +/* Deallocate an xtensa_isa structure. */ +extern void xtensa_isa_free (xtensa_isa); + +/* Get the maximum instruction size in bytes. */ +extern int xtensa_insn_maxlength (xtensa_isa); + +/* Get the total number of opcodes for this processor. */ +extern int xtensa_num_opcodes (xtensa_isa); + +/* Translate a mnemonic name to an opcode. Returns XTENSA_UNDEFINED if + the name is not a valid opcode mnemonic. */ +extern xtensa_opcode xtensa_opcode_lookup (xtensa_isa, const char *); + +/* Decode a binary instruction buffer. Returns the opcode or + XTENSA_UNDEFINED if the instruction is illegal. */ +extern xtensa_opcode xtensa_decode_insn (xtensa_isa, const xtensa_insnbuf); + + +/* Opcode information. */ + +/* Set the opcode field(s) in a binary instruction buffer. The operand + fields are set to zero. */ +extern void xtensa_encode_insn (xtensa_isa, xtensa_opcode, xtensa_insnbuf); + +/* Get the mnemonic name for an opcode. */ +extern const char * xtensa_opcode_name (xtensa_isa, xtensa_opcode); + +/* Find the length (in bytes) of an instruction. */ +extern int xtensa_insn_length (xtensa_isa, xtensa_opcode); + +/* Find the length of an instruction by looking only at the first byte. */ +extern int xtensa_insn_length_from_first_byte (xtensa_isa, char); + +/* Find the number of operands for an instruction. */ +extern int xtensa_num_operands (xtensa_isa, xtensa_opcode); + +/* Get the information about operand number "opnd" of a particular opcode. */ +extern xtensa_operand xtensa_get_operand (xtensa_isa, xtensa_opcode, int); + +/* Operand information. */ + +/* Find the kind of operand. There are three possibilities: + 1) PC-relative immediates (e.g., "l", "L"). These can be identified with + the xtensa_operand_isPCRelative function. + 2) non-PC-relative immediates ("i"). + 3) register-file short names (e.g., "a", "b", "m" and others defined + via TIE). */ +extern char * xtensa_operand_kind (xtensa_operand); + +/* Check if an operand is an input ('<'), output ('>'), or inout ('=') + operand. Note: The output operand of a conditional assignment + (e.g., movnez) appears here as an inout ('=') even if it is declared + in the TIE code as an output ('>'); this allows the compiler to + properly handle register allocation for conditional assignments. */ +extern char xtensa_operand_inout (xtensa_operand); + +/* Get and set the raw (encoded) value of the field for the specified + operand. The "set" function does not check if the value fits in the + field; that is done by the "encode" function below. */ +extern uint32 xtensa_operand_get_field (xtensa_operand, const xtensa_insnbuf); + +extern void xtensa_operand_set_field (xtensa_operand, xtensa_insnbuf, uint32); + + +/* Encode and decode operands. The raw bits in the operand field + may be encoded in a variety of different ways. These functions hide the + details of that encoding. The encode function has a special return type + (xtensa_encode_result) to indicate success or the reason for failure; the + encoded value is returned through the argument pointer. The decode function + has no possibility of failure and returns the decoded value. */ + +typedef enum +{ + xtensa_encode_result_ok, + xtensa_encode_result_align, + xtensa_encode_result_not_in_table, + xtensa_encode_result_too_low, + xtensa_encode_result_too_high, + xtensa_encode_result_not_ok, + xtensa_encode_result_max = xtensa_encode_result_not_ok +} xtensa_encode_result; + +extern xtensa_encode_result xtensa_operand_encode (xtensa_operand, uint32 *); + +extern uint32 xtensa_operand_decode (xtensa_operand, uint32); + + +/* For PC-relative offset operands, the interpretation of the offset may vary + between opcodes, e.g., is it relative to the current PC or that of the next + instruction? The following functions are defined to perform PC-relative + relocations and to undo them (as in the disassembler). The first function + takes the desired address and the PC of the current instruction and returns + the unencoded value to be stored in the offset field. The second function + takes the unencoded offset value and the current PC and returns the address. + Note that these functions do not replace the encode/decode functions; the + operands must be encoded/decoded separately. */ + +extern int xtensa_operand_isPCRelative (xtensa_operand); + +extern uint32 xtensa_operand_do_reloc (xtensa_operand, uint32, uint32); + +extern uint32 xtensa_operand_undo_reloc (xtensa_operand, uint32, uint32); + +#ifdef __cplusplus +} +#endif +#endif /* XTENSA_LIBISA_H */ -- cgit v1.2.3